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authorIngo Albrecht2010-04-11 09:52:25 +0200
committerIngo Albrecht2010-07-20 14:41:19 +0200
commit3f998d80ebfc85c86cc28609f35ae1c7ca392a16 (patch)
tree446c9ad4281e5726f23a2feff9666cde5f6f20fb /src/target/firmware/board
parentfirmware: linker script and startup code reorg. (diff)
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firmware: separated various pieces of interrupt handling apart
Diffstat (limited to 'src/target/firmware/board')
-rw-r--r--src/target/firmware/board/compal/exceptions_redirect.S18
-rw-r--r--src/target/firmware/board/compal/exceptions_redirected.S20
-rw-r--r--src/target/firmware/board/compal/handlers.S79
-rw-r--r--src/target/firmware/board/compal/header.S11
-rw-r--r--src/target/firmware/board/compal/start.S90
5 files changed, 128 insertions, 90 deletions
diff --git a/src/target/firmware/board/compal/exceptions_redirect.S b/src/target/firmware/board/compal/exceptions_redirect.S
new file mode 100644
index 0000000..d2d971b
--- /dev/null
+++ b/src/target/firmware/board/compal/exceptions_redirect.S
@@ -0,0 +1,18 @@
+
+/* XXX this should dispatch via 0x80001c */
+
+.section .text.exceptions
+_undef_instr:
+ b _undef_instr
+_sw_interr:
+ b _sw_interr
+_prefetch_abort:
+ b _prefetch_abort
+_data_abort:
+ b _data_abort
+_reserved:
+ b _reserved
+_irq:
+ b _irq
+_fiq:
+ b _fiq
diff --git a/src/target/firmware/board/compal/exceptions_redirected.S b/src/target/firmware/board/compal/exceptions_redirected.S
new file mode 100644
index 0000000..6908396
--- /dev/null
+++ b/src/target/firmware/board/compal/exceptions_redirected.S
@@ -0,0 +1,20 @@
+
+/* Exception Vectors like they are needed for the exception vector
+ indirection of the internal boot ROM. The following section must be liked
+ to appear at 0x80001c */
+.section .text.exceptions
+_undef_instr:
+ b handle_abort
+_sw_interr:
+ b _sw_interr
+_prefetch_abort:
+ b handle_abort
+_data_abort:
+ b handle_abort
+_reserved:
+ b _reserved
+_irq:
+ b irq_entry
+_fiq:
+ b fiq_entry
+
diff --git a/src/target/firmware/board/compal/handlers.S b/src/target/firmware/board/compal/handlers.S
new file mode 100644
index 0000000..ef044e3
--- /dev/null
+++ b/src/target/firmware/board/compal/handlers.S
@@ -0,0 +1,79 @@
+
+ .EQU I_BIT, 0x80
+ .EQU F_BIT, 0x40
+
+.section .text
+
+/* handler for all kinds of aborts */
+.global handle_abort
+handle_abort:
+ @ print the PC we would jump back to...
+ sub lr, lr, #4 @ we assume to be ARM32
+
+ mov r0, lr
+ mov r1, #8
+ bl phex
+
+ @ print abort message
+ mov r0, #'A'
+ bl putchar_asm
+ mov r0, #'B'
+ bl putchar_asm
+ mov r0, #'O'
+ bl putchar_asm
+ mov r0, #'R'
+ bl putchar_asm
+ mov r0, #'T'
+ bl putchar_asm
+
+ @ disable IRQ and FIQ
+ msr CPSR_c, #I_BIT | F_BIT
+
+0: @ dead
+ b 0b
+
+/* entry point for IRQs */
+.global irq_entry
+irq_entry:
+ /* Adjust and save LR_irq in IRQ stack */
+ sub lr, lr, #4
+ stmfd sp!, {lr}
+
+ /* Save SPSR for nested interrupt */
+ mrs r14, SPSR
+ stmfd sp!, {r14}
+
+ /* Call the interrupt handler C function */
+ stmfd sp!, {r0-r4, r12}
+ bl irq
+ ldmfd sp!, {r0-r4, r12}
+
+ /* Restore SPSR_irq from IRQ stack */
+ ldmia sp!, {r14}
+ msr SPSR_cxsf, r14
+
+ /* Restore adjusted LR_irq from IRQ stack directly in the PC */
+ ldmia sp!, {pc}^
+
+/* entry point for FIQs */
+.global fiq_entry
+fiq_entry:
+ /* Adjust and save LR_irq in IRQ stack */
+ sub lr, lr, #4
+ stmfd sp!, {lr}
+
+ /* Save SPSR for nested interrupt */
+ mrs r14, SPSR
+ stmfd sp!, {r14}
+
+ /* Call the interrupt handler C function */
+ stmfd sp!, {r0-r4, r12}
+ bl fiq
+ ldmfd sp!, {r0-r4, r12}
+
+ /* Restore SPSR_irq from IRQ stack */
+ ldmia sp!, {r14}
+ msr SPSR_cxsf, r14
+
+ /* Restore adjusted LR_irq from IRQ stack directly in the PC */
+ ldmia sp!, {pc}^
diff --git a/src/target/firmware/board/compal/header.S b/src/target/firmware/board/compal/header.S
new file mode 100644
index 0000000..747f680
--- /dev/null
+++ b/src/target/firmware/board/compal/header.S
@@ -0,0 +1,11 @@
+/*
+ * This is a textual header that is prepended to images where appropriate.
+ *
+ * It is meant to ease identification of our firmwares in dumps as well
+ * as filling some space that is used for the same purpose by the vendor.
+ *
+ */
+.section .compal.header
+.ascii "OSMOCOM"
+. = 0x20
+.ascii GIT_REVISION
diff --git a/src/target/firmware/board/compal/start.S b/src/target/firmware/board/compal/start.S
index 3036fec..dcbe1e8 100644
--- a/src/target/firmware/board/compal/start.S
+++ b/src/target/firmware/board/compal/start.S
@@ -72,93 +72,3 @@ _jump_main: .word main
_ctor_list: .word __CTOR_LIST__
_ctor_end: .word __CTOR_END__
-/* handler for all kinds of aborts */
-handle_abort:
- @ print the PC we would jump back to...
- sub lr, lr, #4 @ we assume to be ARM32
-
- mov r0, lr
- mov r1, #8
- bl phex
-
- @ print abort message
- mov r0, #'A'
- bl putchar_asm
- mov r0, #'B'
- bl putchar_asm
- mov r0, #'O'
- bl putchar_asm
- mov r0, #'R'
- bl putchar_asm
- mov r0, #'T'
- bl putchar_asm
-
- @ disable IRQ and FIQ
- msr CPSR_c, #I_BIT | F_BIT
-
-0: @ dead
- b 0b
-
-/* entry point for IRQs */
-irq_entry:
- /* Adjust and save LR_irq in IRQ stack */
- sub lr, lr, #4
- stmfd sp!, {lr}
-
- /* Save SPSR for nested interrupt */
- mrs r14, SPSR
- stmfd sp!, {r14}
-
- /* Call the interrupt handler C function */
- stmfd sp!, {r0-r4, r12}
- bl irq
- ldmfd sp!, {r0-r4, r12}
-
- /* Restore SPSR_irq from IRQ stack */
- ldmia sp!, {r14}
- msr SPSR_cxsf, r14
-
- /* Restore adjusted LR_irq from IRQ stack directly in the PC */
- ldmia sp!, {pc}^
-
-/* entry point for FIQs */
-fiq_entry:
- /* Adjust and save LR_irq in IRQ stack */
- sub lr, lr, #4
- stmfd sp!, {lr}
-
- /* Save SPSR for nested interrupt */
- mrs r14, SPSR
- stmfd sp!, {r14}
-
- /* Call the interrupt handler C function */
- stmfd sp!, {r0-r4, r12}
- bl fiq
- ldmfd sp!, {r0-r4, r12}
-
- /* Restore SPSR_irq from IRQ stack */
- ldmia sp!, {r14}
- msr SPSR_cxsf, r14
-
- /* Restore adjusted LR_irq from IRQ stack directly in the PC */
- ldmia sp!, {pc}^
-
-/* Exception Vectors like they are needed for the exception vector
- indirection of the internal boot ROM. The following section must be liked
- to appear at 0x80'001c */
-.section .text.exceptions
-_undef_instr:
- b handle_abort
-_sw_interr:
- b _sw_interr
-_prefetch_abort:
- b handle_abort
-_data_abort:
- b handle_abort
-_reserved:
- b _reserved
-_irq:
- b irq_entry
-_fiq:
- b fiq_entry
-