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authorIngo Albrecht2010-03-13 21:14:31 +0100
committerHarald Welte2010-04-08 10:35:25 +0200
commite2b491486ffc03fffbcb7d38f577458ed3427804 (patch)
treeaee982d25c07439bd0d6dd475fc325fb78441102 /src/target/firmware/board
parentfirmware: linker script indentation and comments. (diff)
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firmware: correct linker scripts, more commonplace section naming, reorganized start code.
Diffstat (limited to 'src/target/firmware/board')
-rw-r--r--src/target/firmware/board/common/calypso_pwl.S21
-rw-r--r--src/target/firmware/board/common/calypso_uart.S92
-rw-r--r--src/target/firmware/board/common/compal_osmoload.lds28
-rw-r--r--src/target/firmware/board/common/compal_ramload.lds27
-rw-r--r--src/target/firmware/board/common/compal_ramload_start.S131
5 files changed, 154 insertions, 145 deletions
diff --git a/src/target/firmware/board/common/calypso_pwl.S b/src/target/firmware/board/common/calypso_pwl.S
new file mode 100644
index 0000000..90e29bf
--- /dev/null
+++ b/src/target/firmware/board/common/calypso_pwl.S
@@ -0,0 +1,21 @@
+
+/* Calypso PWL driver */
+
+#define ASIC_CONF_REG 0xfffef008
+#define BA_PWL 0xfffe8000
+
+.globl pwl_init
+pwl_init: ldr r1, =ASIC_CONF_REG
+ ldr r2, [r1]
+ orr r2, r2, #0x10 @ set light output to PWL
+ str r2, [r1]
+ ldr r1, =BA_PWL
+ mov r0, #1
+ strb r0, [r1, #1] @ enable clock of PWL unut
+ mov pc, lr
+
+.globl pwl_set_level
+pwl_set_level: ldr r1, =BA_PWL
+ strb r0, [r1]
+ mov pc, lr
+
diff --git a/src/target/firmware/board/common/calypso_uart.S b/src/target/firmware/board/common/calypso_uart.S
new file mode 100644
index 0000000..517a965
--- /dev/null
+++ b/src/target/firmware/board/common/calypso_uart.S
@@ -0,0 +1,92 @@
+/* uart routines for early assembly code */
+
+#define BA_UART_MODEM 0xFFFF5800
+
+.macro senduart, rd, rx
+ strb \rd, [\rx, #0]
+.endm
+
+.macro busyuart, rd, rx
+1001:
+ @busy waiting until THR is empty
+ ldrb \rd, [\rx, #5] @ read LSR register
+ mov \rd, \rd, lsr #6
+ tst \rd, #1
+ beq 1001b
+.endm
+
+.macro loadsp, rd
+ ldr \rd, =BA_UART_MODEM
+.endm
+
+.section .text
+
+ .align 2
+ .type phexbuf, #object
+phexbuf: .space 12
+ .size phexubf, . - phexbuf
+
+.globl phex
+phex: adr r3, phexbuf
+ mov r2, #0
+ strb r2, [r3, r1]
+1: subs r1, r1, #1
+ movmi r0, r3
+ bmi puts_asm
+ and r2, r0, #15
+ mov r0, r0, lsr #4
+ cmp r2, #10
+ addge r2, r2, #7
+ add r2, r2, #'0'
+ strb r2, [r3, r1]
+ b 1b
+
+.globl puts_asm
+puts_asm: loadsp r3
+1: ldrb r2, [r0], #1
+ teq r2, #0
+ moveq pc, lr
+2: senduart r2, r3
+ busyuart r1, r3
+ teq r2, #'\n'
+ moveq r2, #'\r'
+ beq 2b
+ teq r0, #0
+ bne 1b
+ mov pc, lr
+
+.globl putchar_asm
+putchar_asm:
+ mov r2, r0
+ mov r0, #0
+ loadsp r3
+ b 2b
+
+.globl memdump_asm
+memdump_asm: mov r12, r0
+ mov r10, lr
+ mov r11, #0
+2: mov r0, r11, lsl #2
+ add r0, r0, r12
+ mov r1, #8
+ bl phex
+ mov r0, #':'
+ bl putchar_asm
+1: mov r0, #' '
+ bl putchar_asm
+ ldr r0, [r12, r11, lsl #2]
+ mov r1, #8
+ bl phex
+ and r0, r11, #7
+ teq r0, #3
+ moveq r0, #' '
+ bleq putchar_asm
+ and r0, r11, #7
+ add r11, r11, #1
+ teq r0, #7
+ bne 1b
+ mov r0, #'\n'
+ bl putchar_asm
+ cmp r11, #64
+ blt 2b
+ mov pc, r10
diff --git a/src/target/firmware/board/common/compal_osmoload.lds b/src/target/firmware/board/common/compal_osmoload.lds
index 7519d7d..22d2a05 100644
--- a/src/target/firmware/board/common/compal_osmoload.lds
+++ b/src/target/firmware/board/common/compal_osmoload.lds
@@ -3,35 +3,32 @@ OUTPUT_ARCH(arm)
ENTRY(_start)
MEMORY
{
- /* area that can be initialized by the loader (plus some reserved stuff) */
+ /* compal-loaded binary: text, initialized data */
LRAM (rw) : ORIGIN = 0x00800000, LENGTH = 0x00010000
- /* bss for osmoload */
+ /* compal-loaded binary: unitialized data, stacks, heap */
DRAM (rw) : ORIGIN = 0x00810000, LENGTH = 0x00010000
- /* remainder of internal ram, can be used for bss and the like */
+ /* remainder of internal ram: this is where we are linking to */
IRAM (rw) : ORIGIN = 0x00820000, LENGTH = 0x00020000
- /* external ram on a C123 */
- ERAM (rw) : ORIGIN = 0x01000000, LENGTH = 0x00040000
}
SECTIONS
{
. = 0x820000;
- /* code */
+ /* initialization code */
. = ALIGN(4);
- .text_start : {
- /* initialization code */
+ .text.start : {
PROVIDE(_start = .);
- KEEP(*(.init))
- *(.text._start)
+ KEEP(*(.text.start))
+ *(.text.start)
_exceptions = .;
} > IRAM
/* exception vectors from 0x80001c to 0x800034 */
- .text.exceptions 0x82001c: AT (LOADADDR(.text_start) + SIZEOF(.text_start)) {
+ .text.exceptions 0x80001c : AT (LOADADDR(.text.start) + SIZEOF(.text.start)) {
KEEP(*(.text.exceptions))
* (.text.exceptions)
. = ALIGN(4);
- } > IRAM
+ } > LRAM
/* code */
. = ALIGN(4);
@@ -39,6 +36,8 @@ SECTIONS
AT (LOADADDR(.text.exceptions) + SIZEOF(.text.exceptions)) {
/* regular code */
*(.text*)
+ /* gcc voodoo */
+ *(.glue_7t) *(.glue_7) *(.vfp11_veneer) *(.v4_bx)
} > IRAM
/* read-only data */
@@ -56,14 +55,15 @@ SECTIONS
/* pic offset tables */
. = ALIGN(4);
.got : {
- *(.got)
+ *(.got)
+ *(.got.plt) *(.igot.plt) *(.got) *(.igot)
} > IRAM
/* uninitialized data */
.bss (NOLOAD) : {
. = ALIGN(4);
__bss_start = .;
- *(.bss)
+ *(.bss)
} > IRAM
. = ALIGN(4);
__bss_end = .;
diff --git a/src/target/firmware/board/common/compal_ramload.lds b/src/target/firmware/board/common/compal_ramload.lds
index b808694..4bddccf 100644
--- a/src/target/firmware/board/common/compal_ramload.lds
+++ b/src/target/firmware/board/common/compal_ramload.lds
@@ -3,12 +3,10 @@ OUTPUT_ARCH(arm)
ENTRY(_start)
MEMORY
{
- /* area that can be initialized by the loader (plus some reserved stuff) */
+ /* compal-loaded binary: our text, initialized data */
LRAM (rw) : ORIGIN = 0x00800000, LENGTH = 0x00010000
- /* remainder of internal ram, can be used for bss and the like */
- IRAM (rw) : ORIGIN = 0x00810000, LENGTH = 0x00030000
- /* external ram on a C123 */
- ERAM (rw) : ORIGIN = 0x01000000, LENGTH = 0x00040000
+ /* compal-loaded binary: our unitialized data, stacks, heap */
+ IRAM (rw) : ORIGIN = 0x00810000, LENGTH = 0x00010000
}
SECTIONS
{
@@ -22,32 +20,34 @@ SECTIONS
/* initialization code */
. = ALIGN(4);
- .text_start : {
+ .text.start : {
PROVIDE(_start = .);
- KEEP(*(.init))
- *(.text._start)
+ KEEP(*(.text.start))
+ *(.text.start)
_exceptions = .;
} > LRAM
/* exception vectors from 0x80001c to 0x800034 */
- .text.exceptions 0x80001c: AT (LOADADDR(.text_start) + SIZEOF(.text_start)) {
+ .text.exceptions 0x80001c : AT (LOADADDR(.text.start) + SIZEOF(.text.start)) {
KEEP(*(.text.exceptions))
* (.text.exceptions)
. = ALIGN(4);
} > LRAM
- /* normal code */
+ /* code */
. = ALIGN(4);
.text (LOADADDR(.text.exceptions) + SIZEOF(.text.exceptions)) :
AT (LOADADDR(.text.exceptions) + SIZEOF(.text.exceptions)) {
/* regular code */
*(.text*)
+ /* gcc voodoo */
+ *(.glue_7t) *(.glue_7) *(.vfp11_veneer) *(.v4_bx)
} > LRAM
/* read-only data */
. = ALIGN(4);
.rodata : {
- *(.rodata*)
+ *(.rodata*)
} > LRAM
/* initialized data */
@@ -59,14 +59,15 @@ SECTIONS
/* pic offset tables */
. = ALIGN(4);
.got : {
- *(.got)
+ *(.got)
+ *(.got.plt) *(.igot.plt) *(.got) *(.igot)
} > LRAM
/* uninitialized data */
.bss (NOLOAD) : {
. = ALIGN(4);
__bss_start = .;
- *(.bss)
+ *(.bss)
} > IRAM
. = ALIGN(4);
__bss_end = .;
diff --git a/src/target/firmware/board/common/compal_ramload_start.S b/src/target/firmware/board/common/compal_ramload_start.S
index d7e2de2..8c5d2cc 100644
--- a/src/target/firmware/board/common/compal_ramload_start.S
+++ b/src/target/firmware/board/common/compal_ramload_start.S
@@ -1,26 +1,4 @@
-#define BA_UART_MODEM 0xFFFF5800
-
-#
-
-.macro senduart, rd, rx
- strb \rd, [\rx, #0]
-.endm
-
-.macro busyuart, rd, rx
-1001:
- @busy waiting until THR is empty
- ldrb \rd, [\rx, #5] @ read LSR register
- mov \rd, \rd, lsr #6
- tst \rd, #1
- beq 1001b
-.endm
-
-.macro loadsp, rd
- ldr \rd, =BA_UART_MODEM
-.endm
-
-
.EQU ARM_MODE_FIQ, 0x11
.EQU ARM_MODE_IRQ, 0x12
.EQU ARM_MODE_SVC, 0x13
@@ -32,10 +10,11 @@
#define FIQ_STACK_SIZE 1024
#define IRQ_STACK_SIZE 1024
-.section .text._start
+.section .text.start
+
.globl _start
_start:
- @ clear bss section
+ /* clear bss section */
.global __bss_start
.global __bss_end
mov r0, #0
@@ -45,7 +24,9 @@ _start:
strlo r0, [r1], #4
blo 2b
+ /* initialize stacks, starting at TOP_OF_RAM */
ldr r0, =TOP_OF_RAM
+
/* initialize FIQ stack */
msr CPSR_c, #ARM_MODE_FIQ | I_BIT | F_BIT
mov r13, r0
@@ -60,119 +41,31 @@ _start:
msr CPSR_c, #ARM_MODE_SVC | I_BIT | F_BIT
mov r13, r0
- @ set backlight to moderate level
+ /* set backlight to moderate level */
bl pwl_init
mov r0, #50
bl pwl_set_level
+ /* test uart output */
@ldr r0, =string
@bl puts_asm
- @ some memory dumps
+ /* dump some memory */
@ldr r0, =0xfffef000
@bl memdump
@ldr r0, =0xfffffe00
@bl memdump
+ /* jump to main */
ldr pc, _jump_main
- @ endless loop at end of program
+ /* endless loop at end of program */
_end: b _end
b _start
_jump_main: .word main
-string: .word 0x6c6c6548
- .word 0x6f57206f
- .word 0x00646c72
-
-foo: .word 0xee4c9f63
-bar: .word 0x639f4cee
-
- .align 2
- .type phexbuf, #object
-phexbuf: .space 12
- .size phexubf, . - phexbuf
-
-.globl phex
-phex: adr r3, phexbuf
- mov r2, #0
- strb r2, [r3, r1]
-1: subs r1, r1, #1
- movmi r0, r3
- bmi puts_asm
- and r2, r0, #15
- mov r0, r0, lsr #4
- cmp r2, #10
- addge r2, r2, #7
- add r2, r2, #'0'
- strb r2, [r3, r1]
- b 1b
-
-puts_asm: loadsp r3
-1: ldrb r2, [r0], #1
- teq r2, #0
- moveq pc, lr
-2: senduart r2, r3
- busyuart r1, r3
- teq r2, #'\n'
- moveq r2, #'\r'
- beq 2b
- teq r0, #0
- bne 1b
- mov pc, lr
-.globl putchar_asm
-putchar_asm:
- mov r2, r0
- mov r0, #0
- loadsp r3
- b 2b
-
-memdump: mov r12, r0
- mov r10, lr
- mov r11, #0
-2: mov r0, r11, lsl #2
- add r0, r0, r12
- mov r1, #8
- bl phex
- mov r0, #':'
- bl putchar_asm
-1: mov r0, #' '
- bl putchar_asm
- ldr r0, [r12, r11, lsl #2]
- mov r1, #8
- bl phex
- and r0, r11, #7
- teq r0, #3
- moveq r0, #' '
- bleq putchar_asm
- and r0, r11, #7
- add r11, r11, #1
- teq r0, #7
- bne 1b
- mov r0, #'\n'
- bl putchar_asm
- cmp r11, #64
- blt 2b
- mov pc, r10
-
-
-#define ASIC_CONF_REG 0xfffef008
-#define BA_PWL 0xfffe8000
-
-pwl_init: ldr r1, =ASIC_CONF_REG
- ldr r2, [r1]
- orr r2, r2, #0x10 @ set light output to PWL
- str r2, [r1]
- ldr r1, =BA_PWL
- mov r0, #1
- strb r0, [r1, #1] @ enable clock of PWL unut
- mov pc, lr
-
-pwl_set_level: ldr r1, =BA_PWL
- strb r0, [r1]
- mov pc, lr
-
+/* handler for all kinds of aborts */
handle_abort:
@ print the PC we would jump back to...
sub lr, lr, #4 @ we assume to be ARM32
@@ -199,6 +92,7 @@ handle_abort:
0: @ dead
b 0b
+/* entry point for IRQs */
irq_entry:
/* Adjust and save LR_irq in IRQ stack */
sub lr, lr, #4
@@ -220,6 +114,7 @@ irq_entry:
/* Restore adjusted LR_irq from IRQ stack directly in the PC */
ldmia sp!, {pc}^
+/* entry point for FIQs */
fiq_entry:
/* Adjust and save LR_irq in IRQ stack */
sub lr, lr, #4