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authorAndreas.Eversberg2010-10-30 17:27:03 +0200
committerSylvain Munaut2010-10-30 17:31:09 +0200
commit072d7dd4bfef5bad171d0561a6ce4f984a26fd88 (patch)
treed3db75cebc547a03e4ee9502d94bcd571f6da32f /src/target/firmware/include
parent[layer23] cell_log's scanning depth now depends on movement speed (diff)
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target/fw/layer1: Change L1CTL RACH req to properly use all slots
Written-by: Andreas Eversberg <jolly@eversberg.eu> Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
Diffstat (limited to 'src/target/firmware/include')
-rw-r--r--src/target/firmware/include/layer1/async.h4
-rw-r--r--src/target/firmware/include/layer1/prim.h2
2 files changed, 3 insertions, 3 deletions
diff --git a/src/target/firmware/include/layer1/async.h b/src/target/firmware/include/layer1/async.h
index f4d0b5a..f8d6b71 100644
--- a/src/target/firmware/include/layer1/async.h
+++ b/src/target/firmware/include/layer1/async.h
@@ -29,8 +29,8 @@ void l1a_meas_msgb_set(struct msgb *msg);
/* flush all pending msgb */
void l1a_txq_msgb_flush(struct llist_head *queue);
-/* request a RACH request at the next multiframe T3 = fn51 */
-void l1a_rach_req(uint8_t fn51, uint8_t mf_off, uint8_t ra);
+/* request a RACH */
+void l1a_rach_req(uint16_t offset, uint8_t combined, uint8_t ra);
/* schedule frequency change */
void l1a_freq_req(uint32_t fn_sched);
diff --git a/src/target/firmware/include/layer1/prim.h b/src/target/firmware/include/layer1/prim.h
index c8e49a6..6ff40c9 100644
--- a/src/target/firmware/include/layer1/prim.h
+++ b/src/target/firmware/include/layer1/prim.h
@@ -20,7 +20,7 @@ void l1s_nb_test(uint8_t base_fn);
void l1s_fbsb_req(uint8_t base_fn, struct l1ctl_fbsb_req *req);
void l1a_freq_req(uint32_t fn_sched);
-void l1a_rach_req(uint8_t fn51, uint8_t mf_off, uint8_t ra);
+void l1a_rach_req(uint16_t offset, uint8_t combined, uint8_t ra);
/* Primitives raw scheduling sets */
extern const struct tdma_sched_item nb_sched_set[];