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authorTom2011-08-16 15:41:46 +0200
committerTom2011-08-16 15:41:46 +0200
commitf910171deda0933e506cf3ffc216ee8daa418c24 (patch)
treedddee7cdad41fc4f3d8c1de95148d0a2daac1193 /Src/osmoconbb/src/target/firmware/board/common/calypso_pwl.S
parentanother system info 2 description (diff)
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corrected spelling mistake and added 2 new papers for gsm specs
Diffstat (limited to 'Src/osmoconbb/src/target/firmware/board/common/calypso_pwl.S')
-rw-r--r--Src/osmoconbb/src/target/firmware/board/common/calypso_pwl.S21
1 files changed, 21 insertions, 0 deletions
diff --git a/Src/osmoconbb/src/target/firmware/board/common/calypso_pwl.S b/Src/osmoconbb/src/target/firmware/board/common/calypso_pwl.S
new file mode 100644
index 0000000..90e29bf
--- /dev/null
+++ b/Src/osmoconbb/src/target/firmware/board/common/calypso_pwl.S
@@ -0,0 +1,21 @@
+
+/* Calypso PWL driver */
+
+#define ASIC_CONF_REG 0xfffef008
+#define BA_PWL 0xfffe8000
+
+.globl pwl_init
+pwl_init: ldr r1, =ASIC_CONF_REG
+ ldr r2, [r1]
+ orr r2, r2, #0x10 @ set light output to PWL
+ str r2, [r1]
+ ldr r1, =BA_PWL
+ mov r0, #1
+ strb r0, [r1, #1] @ enable clock of PWL unut
+ mov pc, lr
+
+.globl pwl_set_level
+pwl_set_level: ldr r1, =BA_PWL
+ strb r0, [r1]
+ mov pc, lr
+