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-rw-r--r--Src/osmoconbb/src/target/firmware/board/compal/LINKAGE.txt12
-rw-r--r--Src/osmoconbb/src/target/firmware/board/compal/exceptions_redirect.S24
-rw-r--r--Src/osmoconbb/src/target/firmware/board/compal/exceptions_redirected.S20
-rw-r--r--Src/osmoconbb/src/target/firmware/board/compal/handlers.S79
-rw-r--r--Src/osmoconbb/src/target/firmware/board/compal/header.S11
-rw-r--r--Src/osmoconbb/src/target/firmware/board/compal/highram.lds121
-rw-r--r--Src/osmoconbb/src/target/firmware/board/compal/macros.S76
-rw-r--r--Src/osmoconbb/src/target/firmware/board/compal/ram.lds123
-rw-r--r--Src/osmoconbb/src/target/firmware/board/compal/rf_power.c62
-rw-r--r--Src/osmoconbb/src/target/firmware/board/compal/rffe_dualband.c102
-rw-r--r--Src/osmoconbb/src/target/firmware/board/compal/start.ram.S26
-rw-r--r--Src/osmoconbb/src/target/firmware/board/compal/start.rom.S32
12 files changed, 688 insertions, 0 deletions
diff --git a/Src/osmoconbb/src/target/firmware/board/compal/LINKAGE.txt b/Src/osmoconbb/src/target/firmware/board/compal/LINKAGE.txt
new file mode 100644
index 0000000..1ae06fb
--- /dev/null
+++ b/Src/osmoconbb/src/target/firmware/board/compal/LINKAGE.txt
@@ -0,0 +1,12 @@
+
+We provide the following common RAM linkages for all Compal phones:
+
+(both use the Calypso ROM loader for interrupt redirect, if required)
+
+ compalram:
+ Image for the Compal ramloader. Starts at a weird address and
+ contains various ramloader specifics.
+
+ highram:
+ Image linked to 0x820000, used for various special purposes.
+ This image is completely independent of the compal loader.
diff --git a/Src/osmoconbb/src/target/firmware/board/compal/exceptions_redirect.S b/Src/osmoconbb/src/target/firmware/board/compal/exceptions_redirect.S
new file mode 100644
index 0000000..a216e60
--- /dev/null
+++ b/Src/osmoconbb/src/target/firmware/board/compal/exceptions_redirect.S
@@ -0,0 +1,24 @@
+
+.section .text.exceptions
+_undef_instr:
+ ldr pc, _vec_undef_instr
+_sw_interr:
+ ldr pc, _vec_sw_interr
+_prefetch_abort:
+ ldr pc, _vec_prefetch_abort
+_data_abort:
+ ldr pc, _vec_data_abort
+_reserved:
+ ldr pc, _vec_reserved
+_irq:
+ ldr pc, _vec_irq
+_fiq:
+ ldr pc, _vec_fiq
+
+_vec_undef_instr: .word(0x80001c)
+_vec_sw_interr: .word(0x800020)
+_vec_prefetch_abort: .word(0x800024)
+_vec_data_abort: .word(0x800028)
+_vec_reserved: .word(0x80002c)
+_vec_irq: .word(0x800030)
+_vec_fiq: .word(0x800034)
diff --git a/Src/osmoconbb/src/target/firmware/board/compal/exceptions_redirected.S b/Src/osmoconbb/src/target/firmware/board/compal/exceptions_redirected.S
new file mode 100644
index 0000000..6908396
--- /dev/null
+++ b/Src/osmoconbb/src/target/firmware/board/compal/exceptions_redirected.S
@@ -0,0 +1,20 @@
+
+/* Exception Vectors like they are needed for the exception vector
+ indirection of the internal boot ROM. The following section must be liked
+ to appear at 0x80001c */
+.section .text.exceptions
+_undef_instr:
+ b handle_abort
+_sw_interr:
+ b _sw_interr
+_prefetch_abort:
+ b handle_abort
+_data_abort:
+ b handle_abort
+_reserved:
+ b _reserved
+_irq:
+ b irq_entry
+_fiq:
+ b fiq_entry
+
diff --git a/Src/osmoconbb/src/target/firmware/board/compal/handlers.S b/Src/osmoconbb/src/target/firmware/board/compal/handlers.S
new file mode 100644
index 0000000..ef044e3
--- /dev/null
+++ b/Src/osmoconbb/src/target/firmware/board/compal/handlers.S
@@ -0,0 +1,79 @@
+
+ .EQU I_BIT, 0x80
+ .EQU F_BIT, 0x40
+
+.section .text
+
+/* handler for all kinds of aborts */
+.global handle_abort
+handle_abort:
+ @ print the PC we would jump back to...
+ sub lr, lr, #4 @ we assume to be ARM32
+
+ mov r0, lr
+ mov r1, #8
+ bl phex
+
+ @ print abort message
+ mov r0, #'A'
+ bl putchar_asm
+ mov r0, #'B'
+ bl putchar_asm
+ mov r0, #'O'
+ bl putchar_asm
+ mov r0, #'R'
+ bl putchar_asm
+ mov r0, #'T'
+ bl putchar_asm
+
+ @ disable IRQ and FIQ
+ msr CPSR_c, #I_BIT | F_BIT
+
+0: @ dead
+ b 0b
+
+/* entry point for IRQs */
+.global irq_entry
+irq_entry:
+ /* Adjust and save LR_irq in IRQ stack */
+ sub lr, lr, #4
+ stmfd sp!, {lr}
+
+ /* Save SPSR for nested interrupt */
+ mrs r14, SPSR
+ stmfd sp!, {r14}
+
+ /* Call the interrupt handler C function */
+ stmfd sp!, {r0-r4, r12}
+ bl irq
+ ldmfd sp!, {r0-r4, r12}
+
+ /* Restore SPSR_irq from IRQ stack */
+ ldmia sp!, {r14}
+ msr SPSR_cxsf, r14
+
+ /* Restore adjusted LR_irq from IRQ stack directly in the PC */
+ ldmia sp!, {pc}^
+
+/* entry point for FIQs */
+.global fiq_entry
+fiq_entry:
+ /* Adjust and save LR_irq in IRQ stack */
+ sub lr, lr, #4
+ stmfd sp!, {lr}
+
+ /* Save SPSR for nested interrupt */
+ mrs r14, SPSR
+ stmfd sp!, {r14}
+
+ /* Call the interrupt handler C function */
+ stmfd sp!, {r0-r4, r12}
+ bl fiq
+ ldmfd sp!, {r0-r4, r12}
+
+ /* Restore SPSR_irq from IRQ stack */
+ ldmia sp!, {r14}
+ msr SPSR_cxsf, r14
+
+ /* Restore adjusted LR_irq from IRQ stack directly in the PC */
+ ldmia sp!, {pc}^
diff --git a/Src/osmoconbb/src/target/firmware/board/compal/header.S b/Src/osmoconbb/src/target/firmware/board/compal/header.S
new file mode 100644
index 0000000..747f680
--- /dev/null
+++ b/Src/osmoconbb/src/target/firmware/board/compal/header.S
@@ -0,0 +1,11 @@
+/*
+ * This is a textual header that is prepended to images where appropriate.
+ *
+ * It is meant to ease identification of our firmwares in dumps as well
+ * as filling some space that is used for the same purpose by the vendor.
+ *
+ */
+.section .compal.header
+.ascii "OSMOCOM"
+. = 0x20
+.ascii GIT_REVISION
diff --git a/Src/osmoconbb/src/target/firmware/board/compal/highram.lds b/Src/osmoconbb/src/target/firmware/board/compal/highram.lds
new file mode 100644
index 0000000..1f0a5a6
--- /dev/null
+++ b/Src/osmoconbb/src/target/firmware/board/compal/highram.lds
@@ -0,0 +1,121 @@
+/*
+ * Linker script for running from upper internal RAM on the TI Calypso
+ *
+ * This script creates a binary that can be loaded into high ram on
+ * all Calypso devices. It can be jumped into directly at the load
+ * address.
+ *
+ * This is used for debugging the loader and for general hacking purposes.
+ *
+ */
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+ENTRY(_start)
+MEMORY
+{
+ /* lowram: could be anything, we place exception vectors here */
+ XRAM (rw) : ORIGIN = 0x00800000, LENGTH = 0x00020000
+ /* highram binary: our text, initialized data */
+ LRAM (rw) : ORIGIN = 0x00820000, LENGTH = 0x00010000
+ /* highram binary: our unitialized data, stacks, heap */
+ IRAM (rw) : ORIGIN = 0x00830000, LENGTH = 0x00010000
+}
+SECTIONS
+{
+ . = 0x820000;
+
+ /* initialization code */
+ .text.start : {
+ PROVIDE(_start = .);
+ KEEP(*(.text.start))
+ *(.text.start)
+ } > LRAM
+
+ /* exception vectors linked for 0x80001c to 0x800034 */
+ .text.exceptions 0x80001c : AT (LOADADDR(.text.start) + SIZEOF(.text.start)) {
+ KEEP(*(.text.exceptions))
+ * (.text.exceptions)
+ . = ALIGN(4);
+ } > XRAM
+ PROVIDE(_exceptions = LOADADDR(.text.exceptions));
+
+ /* code */
+ . = ALIGN(4);
+ .text (LOADADDR(.text.exceptions) + SIZEOF(.text.exceptions)) :
+ AT (LOADADDR(.text.exceptions) + SIZEOF(.text.exceptions)) {
+ /* regular code */
+ *(.text*)
+ /* always-in-ram code */
+ *(.ramtext*)
+ /* gcc voodoo */
+ *(.glue_7t) *(.glue_7) *(.vfp11_veneer) *(.v4_bx)
+ . = ALIGN(4);
+ } > LRAM
+ PROVIDE(_text_start = LOADADDR(.text));
+ PROVIDE(_text_end = LOADADDR(.text) + SIZEOF(.text));
+
+ /* constructor pointers */
+ .ctors : {
+ /* ctor count */
+ LONG(SIZEOF(.ctors) / 4 - 2)
+ /* ctor pointers */
+ KEEP(*(SORT(.ctors)))
+ /* end of list */
+ LONG(0)
+ } > LRAM
+ PROVIDE(_ctor_start = LOADADDR(.ctors));
+ PROVIDE(_ctor_end = LOADADDR(.ctors) + SIZEOF(.ctors));
+
+ /* destructor pointers */
+ .dtors : {
+ /* dtor count */
+ LONG(SIZEOF(.dtors) / 4 - 2)
+ /* dtor pointers */
+ KEEP(*(SORT(.dtors)))
+ /* end of list */
+ LONG(0)
+ } > LRAM
+ PROVIDE(_dtor_start = LOADADDR(.dtors));
+ PROVIDE(_dtor_end = LOADADDR(.dtors) + SIZEOF(.dtors));
+
+ /* read-only data */
+ . = ALIGN(4);
+ .rodata : {
+ *(.rodata*)
+ } > LRAM
+ PROVIDE(_rodata_start = LOADADDR(.rodata));
+ PROVIDE(_rodata_end = LOADADDR(.rodata) + SIZEOF(.rodata));
+
+ /* initialized data */
+ . = ALIGN(4);
+ .data : {
+ *(.data)
+ } > LRAM
+ PROVIDE(_data_start = LOADADDR(.data));
+ PROVIDE(_data_end = LOADADDR(.data) + SIZEOF(.data));
+
+ /* pic offset tables */
+ . = ALIGN(4);
+ .got : {
+ *(.got)
+ *(.got.plt) *(.igot.plt) *(.got) *(.igot)
+ } > LRAM
+ PROVIDE(_got_start = LOADADDR(.got));
+ PROVIDE(_got_end = LOADADDR(.got) + SIZEOF(.got));
+
+ /* uninitialized data */
+ .bss (NOLOAD) : {
+ . = ALIGN(4);
+ __bss_start = .;
+ *(.bss)
+ } > IRAM
+ . = ALIGN(4);
+ __bss_end = .;
+ PROVIDE(_bss_start = __bss_start);
+ PROVIDE(_bss_end = __bss_end);
+
+ /* end of image */
+ . = ALIGN(4);
+ _end = .;
+ PROVIDE(end = .);
+}
diff --git a/Src/osmoconbb/src/target/firmware/board/compal/macros.S b/Src/osmoconbb/src/target/firmware/board/compal/macros.S
new file mode 100644
index 0000000..613e6bd
--- /dev/null
+++ b/Src/osmoconbb/src/target/firmware/board/compal/macros.S
@@ -0,0 +1,76 @@
+
+.macro clear_bss
+ mov r0, #0
+ ldr r1, =__bss_start
+ ldr r2, =__bss_end
+loop_bss:
+ cmp r1, r2
+ strlo r0, [r1], #4
+ blo loop_bss
+.endm
+
+.macro copy_data
+ ldr r0, =__data_start
+ ldr r1, =_data_start
+ ldr r2, =__data_end
+ cmp r0, r2
+ beq done_data
+loop_data:
+ ldrb r4, [r0], #1
+ strb r4, [r1], #1
+ cmp r0, r2
+ bne loop_data
+done_data:
+.endm
+
+.macro copy_ramtext
+ ldr r0, =__ramtext_start
+ ldr r1, =_ramtext_start
+ ldr r2, =__ramtext_end
+ cmp r0, r2
+ beq done_ramtext
+loop_ramtext:
+ ldrb r4, [r0], #1
+ strb r4, [r1], #1
+ cmp r0, r2
+ bne loop_ramtext
+done_ramtext:
+.endm
+
+ .EQU ARM_MODE_FIQ, 0x11
+ .EQU ARM_MODE_IRQ, 0x12
+ .EQU ARM_MODE_SVC, 0x13
+
+ .EQU I_BIT, 0x80
+ .EQU F_BIT, 0x40
+
+#define TOP_OF_RAM 0x083fff0
+#define FIQ_STACK_SIZE 1024
+#define IRQ_STACK_SIZE 1024
+
+.macro init_stacks
+ /* initialize stacks, starting at TOP_OF_RAM */
+ ldr r0, =TOP_OF_RAM
+
+ /* initialize FIQ stack */
+ msr CPSR_c, #ARM_MODE_FIQ | I_BIT | F_BIT
+ mov r13, r0
+ sub r0, r0, #FIQ_STACK_SIZE
+
+ /* initialize IRQ stack */
+ msr CPSR_c, #ARM_MODE_IRQ | I_BIT | F_BIT
+ mov r13, r0
+ sub r0, r0, #IRQ_STACK_SIZE
+
+ /* initialize supervisor stack */
+ msr CPSR_c, #ARM_MODE_SVC | I_BIT | F_BIT
+ mov r13, r0
+.endm
+
+.macro call_ctors
+ /* call constructor functions */
+ ldr r0, =_ctor_start
+ ldr r1, =_ctor_end
+ bl do_global_ctors
+.endm
+
diff --git a/Src/osmoconbb/src/target/firmware/board/compal/ram.lds b/Src/osmoconbb/src/target/firmware/board/compal/ram.lds
new file mode 100644
index 0000000..342870d
--- /dev/null
+++ b/Src/osmoconbb/src/target/firmware/board/compal/ram.lds
@@ -0,0 +1,123 @@
+/*
+ * Linker script for running from internal SRAM on Compal phones
+ *
+ * This script is tailored specifically to the requirements imposed
+ * on us by the Compal bootloader.
+ *
+ */
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+ENTRY(_start)
+MEMORY
+{
+ /* compal-loaded binary: our text, initialized data */
+ LRAM (rw) : ORIGIN = 0x00800000, LENGTH = 0x00010000
+ /* compal-loaded binary: our unitialized data, stacks, heap */
+ IRAM (rw) : ORIGIN = 0x00810000, LENGTH = 0x00010000
+}
+SECTIONS
+{
+ . = 0x800000;
+
+ /* romloader data section, contains passthru interrupt vectors */
+ .compal.loader (NOLOAD) : { . = 0x100; } > LRAM
+
+ /* image signature (prepended by osmocon according to phone type) */
+ .compal.header (NOLOAD) : { . = 4; } > LRAM
+
+ /* initialization code */
+ . = ALIGN(4);
+ .text.start : {
+ PROVIDE(_start = .);
+ KEEP(*(.text.start))
+ *(.text.start)
+ } > LRAM
+
+ /* exception vectors from 0x80001c to 0x800034 */
+ .text.exceptions 0x80001c : AT (LOADADDR(.text.start) + SIZEOF(.text.start)) {
+ KEEP(*(.text.exceptions))
+ * (.text.exceptions)
+ . = ALIGN(4);
+ } > LRAM
+ PROVIDE(_exceptions = LOADADDR(.text.exceptions));
+
+ /* code */
+ . = ALIGN(4);
+ .text (LOADADDR(.text.exceptions) + SIZEOF(.text.exceptions)) :
+ AT (LOADADDR(.text.exceptions) + SIZEOF(.text.exceptions)) {
+ /* regular code */
+ *(.text*)
+ /* always-in-ram code */
+ *(.ramtext*)
+ /* gcc voodoo */
+ *(.glue_7t) *(.glue_7) *(.vfp11_veneer) *(.v4_bx)
+ . = ALIGN(4);
+ } > LRAM
+ PROVIDE(_text_start = LOADADDR(.text));
+ PROVIDE(_text_end = LOADADDR(.text) + SIZEOF(.text));
+
+ /* constructor pointers */
+ .ctors : {
+ /* ctor count */
+ LONG(SIZEOF(.ctors) / 4 - 2)
+ /* ctor pointers */
+ KEEP(*(SORT(.ctors)))
+ /* end of list */
+ LONG(0)
+ } > LRAM
+ PROVIDE(_ctor_start = LOADADDR(.ctors));
+ PROVIDE(_ctor_end = LOADADDR(.ctors) + SIZEOF(.ctors));
+
+ /* destructor pointers */
+ .dtors : {
+ /* dtor count */
+ LONG(SIZEOF(.dtors) / 4 - 2)
+ /* dtor pointers */
+ KEEP(*(SORT(.dtors)))
+ /* end of list */
+ LONG(0)
+ } > LRAM
+ PROVIDE(_dtor_start = LOADADDR(.dtors));
+ PROVIDE(_dtor_end = LOADADDR(.dtors) + SIZEOF(.dtors));
+
+ /* read-only data */
+ . = ALIGN(4);
+ .rodata : {
+ *(.rodata*)
+ } > LRAM
+ PROVIDE(_rodata_start = LOADADDR(.rodata));
+ PROVIDE(_rodata_end = LOADADDR(.rodata) + SIZEOF(.rodata));
+
+ /* initialized data */
+ . = ALIGN(4);
+ .data : {
+ *(.data)
+ } > LRAM
+ PROVIDE(_data_start = LOADADDR(.data));
+ PROVIDE(_data_end = LOADADDR(.data) + SIZEOF(.data));
+
+ /* pic offset tables */
+ . = ALIGN(4);
+ .got : {
+ *(.got)
+ *(.got.plt) *(.igot.plt) *(.got) *(.igot)
+ } > LRAM
+ PROVIDE(_got_start = LOADADDR(.got));
+ PROVIDE(_got_end = LOADADDR(.got) + SIZEOF(.got));
+
+ /* uninitialized data */
+ .bss (NOLOAD) : {
+ . = ALIGN(4);
+ __bss_start = .;
+ *(.bss)
+ } > IRAM
+ . = ALIGN(4);
+ __bss_end = .;
+ PROVIDE(_bss_start = __bss_start);
+ PROVIDE(_bss_end = __bss_end);
+
+ /* end of image */
+ . = ALIGN(4);
+ _end = .;
+ PROVIDE(end = .);
+}
diff --git a/Src/osmoconbb/src/target/firmware/board/compal/rf_power.c b/Src/osmoconbb/src/target/firmware/board/compal/rf_power.c
new file mode 100644
index 0000000..fbbe65a
--- /dev/null
+++ b/Src/osmoconbb/src/target/firmware/board/compal/rf_power.c
@@ -0,0 +1,62 @@
+/* Tx RF power calibration for the Compal/Motorola dualband phones */
+
+/* (C) 2010 by Harald Welte <laforge@gnumonks.org>
+ *
+ * All Rights Reserved
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ */
+
+#include <stdint.h>
+#include <osmocom/core/utils.h>
+
+/* GSM900 ARFCN 33, Measurements by Steve Markgraf / May 2010 */
+const int16_t dbm2apc_gsm900[] = {
+ [0] = 151,
+ [1] = 152,
+ [2] = 153,
+ [3] = 155,
+ [4] = 156,
+ [5] = 158,
+ [6] = 160,
+ [7] = 162,
+ [8] = 164,
+ [9] = 167,
+ [10] = 170,
+ [11] = 173,
+ [12] = 177,
+ [13] = 182,
+ [14] = 187,
+ [15] = 192,
+ [16] = 199,
+ [17] = 206,
+ [18] = 214,
+ [19] = 223,
+ [20] = 233,
+ [21] = 244,
+ [22] = 260,
+ [23] = 271,
+ [24] = 288,
+ [25] = 307,
+ [26] = 327,
+ [27] = 350,
+ [28] = 376,
+ [29] = 407,
+ [30] = 456,
+ [31] = 575,
+};
+
+const int dbm2apc_gsm900_max = ARRAY_SIZE(dbm2apc_gsm900) - 1;
diff --git a/Src/osmoconbb/src/target/firmware/board/compal/rffe_dualband.c b/Src/osmoconbb/src/target/firmware/board/compal/rffe_dualband.c
new file mode 100644
index 0000000..f4b7361
--- /dev/null
+++ b/Src/osmoconbb/src/target/firmware/board/compal/rffe_dualband.c
@@ -0,0 +1,102 @@
+#include <stdint.h>
+#include <stdio.h>
+
+#include <debug.h>
+#include <memory.h>
+#include <rffe.h>
+#include <calypso/tsp.h>
+#include <rf/trf6151.h>
+
+/* This is a value that has been measured on the C123 by Harald: 71dBm,
+ it is the difference between the input level at the antenna and what
+ the DSP reports, subtracted by the total gain of the TRF6151 */
+#define SYSTEM_INHERENT_GAIN 71
+
+/* describe how the RF frontend is wired on the Motorola E88 board (C117/C118/C121/C123) */
+
+#define RITA_RESET TSPACT(0) /* Reset of the Rita TRF6151 */
+#define PA_ENABLE TSPACT(1) /* Enable the Power Amplifier */
+#define TRENA TSPACT(6) /* Transmit Enable (Antenna Switch) */
+#define GSM_TXEN TSPACT(8) /* GSM (as opposed to DCS) Transmit */
+
+#define IOTA_STROBE TSPEN(0) /* Strobe for the Iota TSP */
+#define RITA_STROBE TSPEN(2) /* Strobe for the Rita TSP */
+
+/* switch RF Frontend Mode */
+void rffe_mode(enum gsm_band band, int tx)
+{
+ uint16_t tspact = tsp_act_state();
+
+ /* First we mask off all bits from the state cache */
+ tspact &= ~PA_ENABLE;
+ tspact |= TRENA | GSM_TXEN; /* low-active */
+
+#ifdef CONFIG_TX_ENABLE
+ /* Then we selectively set the bits on, if required */
+ if (tx) {
+ tspact &= ~TRENA;
+ if (band == GSM_BAND_850 || band == GSM_BAND_900)
+ tspact &= ~GSM_TXEN;
+ tspact |= PA_ENABLE;
+ }
+#endif /* TRANSMIT_SUPPORT */
+
+ tsp_act_update(tspact);
+}
+
+/* Returns RF wiring */
+uint32_t rffe_get_rx_ports(void)
+{
+ return (1 << PORT_LO) | (1 << PORT_DCS1800);
+}
+
+uint32_t rffe_get_tx_ports(void)
+{
+ return (1 << PORT_LO) | (1 << PORT_HI);
+}
+
+
+#define MCU_SW_TRACE 0xfffef00e
+#define ARM_CONF_REG 0xfffef006
+
+void rffe_init(void)
+{
+ uint16_t reg;
+
+ reg = readw(ARM_CONF_REG);
+ reg &= ~ (1 << 5); /* TSPACT6 I/O function, not nCS6 */
+ writew(reg, ARM_CONF_REG);
+
+ reg = readw(MCU_SW_TRACE);
+ reg &= ~(1 << 5); /* TSPACT8 I/O function, not nMREQ */
+ writew(reg, MCU_SW_TRACE);
+
+ /* Configure the TSPEN which is connected to the TWL3025 */
+ tsp_setup(IOTA_STROBE, 1, 0, 0);
+
+ trf6151_init(RITA_STROBE, RITA_RESET);
+}
+
+uint8_t rffe_get_gain(void)
+{
+ return trf6151_get_gain();
+}
+
+void rffe_set_gain(uint8_t dbm)
+{
+ trf6151_set_gain(dbm);
+}
+
+const uint8_t system_inherent_gain = SYSTEM_INHERENT_GAIN;
+
+/* Given the expected input level of exp_inp dBm/8 and the target of target_bb
+ * dBm8, configure the RF Frontend with the respective gain */
+void rffe_compute_gain(int16_t exp_inp, int16_t target_bb)
+{
+ trf6151_compute_gain(exp_inp, target_bb);
+}
+
+void rffe_rx_win_ctrl(int16_t exp_inp, int16_t target_bb)
+{
+ /* FIXME */
+}
diff --git a/Src/osmoconbb/src/target/firmware/board/compal/start.ram.S b/Src/osmoconbb/src/target/firmware/board/compal/start.ram.S
new file mode 100644
index 0000000..c8f242c
--- /dev/null
+++ b/Src/osmoconbb/src/target/firmware/board/compal/start.ram.S
@@ -0,0 +1,26 @@
+
+.section .text.start
+
+#include "macros.S"
+
+.globl _start
+_start:
+ /* clear bss section */
+ clear_bss
+
+ /* initialize all stacks */
+ init_stacks
+
+ /* call constructors */
+ call_ctors
+
+ /* jump to main */
+ ldr pc, _jump_main
+
+ /* endless loop at end of program */
+_loop:
+ b _loop
+ b _start
+
+_jump_main:
+ .word main
diff --git a/Src/osmoconbb/src/target/firmware/board/compal/start.rom.S b/Src/osmoconbb/src/target/firmware/board/compal/start.rom.S
new file mode 100644
index 0000000..211bea8
--- /dev/null
+++ b/Src/osmoconbb/src/target/firmware/board/compal/start.rom.S
@@ -0,0 +1,32 @@
+
+.section .text.start
+
+#include "macros.S"
+
+.globl _start
+_start:
+ /* clear bss section */
+ clear_bss
+
+ /* copy data to ram */
+ copy_data
+
+ /* copy alway-in-ram code */
+ copy_ramtext
+
+ /* initialize all stacks */
+ init_stacks
+
+ /* call constructors */
+ call_ctors
+
+ /* jump to main */
+ ldr pc, _jump_main
+
+ /* endless loop at end of program */
+_loop:
+ b _loop
+ b _start
+
+_jump_main:
+ .word main