summaryrefslogtreecommitdiffstats
path: root/Src/osmoconbb/src/target/firmware/include
diff options
context:
space:
mode:
Diffstat (limited to 'Src/osmoconbb/src/target/firmware/include')
-rw-r--r--Src/osmoconbb/src/target/firmware/include/abb/twl3025.h136
-rw-r--r--Src/osmoconbb/src/target/firmware/include/arm.h7
-rw-r--r--Src/osmoconbb/src/target/firmware/include/arpa/inet.h2
-rw-r--r--Src/osmoconbb/src/target/firmware/include/asm/assembler.h113
-rw-r--r--Src/osmoconbb/src/target/firmware/include/asm/atomic.h106
-rw-r--r--Src/osmoconbb/src/target/firmware/include/asm/bitops.h225
-rw-r--r--Src/osmoconbb/src/target/firmware/include/asm/div64.h48
-rw-r--r--Src/osmoconbb/src/target/firmware/include/asm/linkage.h18
-rw-r--r--Src/osmoconbb/src/target/firmware/include/asm/ptrace.h128
-rw-r--r--Src/osmoconbb/src/target/firmware/include/asm/swab.h45
-rw-r--r--Src/osmoconbb/src/target/firmware/include/asm/system.h123
-rw-r--r--Src/osmoconbb/src/target/firmware/include/board.h8
-rw-r--r--Src/osmoconbb/src/target/firmware/include/byteorder.h79
-rw-r--r--Src/osmoconbb/src/target/firmware/include/calypso/backlight.h10
-rw-r--r--Src/osmoconbb/src/target/firmware/include/calypso/buzzer.h34
-rw-r--r--Src/osmoconbb/src/target/firmware/include/calypso/clock.h67
-rw-r--r--Src/osmoconbb/src/target/firmware/include/calypso/dma.h6
-rw-r--r--Src/osmoconbb/src/target/firmware/include/calypso/dsp.h41
-rw-r--r--Src/osmoconbb/src/target/firmware/include/calypso/dsp_api.h1560
-rw-r--r--Src/osmoconbb/src/target/firmware/include/calypso/du.h32
-rw-r--r--Src/osmoconbb/src/target/firmware/include/calypso/irq.h49
-rw-r--r--Src/osmoconbb/src/target/firmware/include/calypso/l1_environment.h385
-rw-r--r--Src/osmoconbb/src/target/firmware/include/calypso/misc.h8
-rw-r--r--Src/osmoconbb/src/target/firmware/include/calypso/rtc.h6
-rwxr-xr-xSrc/osmoconbb/src/target/firmware/include/calypso/sim.h191
-rw-r--r--Src/osmoconbb/src/target/firmware/include/calypso/timer.h25
-rw-r--r--Src/osmoconbb/src/target/firmware/include/calypso/tpu.h122
-rw-r--r--Src/osmoconbb/src/target/firmware/include/calypso/tsp.h31
-rw-r--r--Src/osmoconbb/src/target/firmware/include/comm/msgb.h161
-rw-r--r--Src/osmoconbb/src/target/firmware/include/comm/sercomm.h57
-rw-r--r--Src/osmoconbb/src/target/firmware/include/comm/sercomm_cons.h10
-rw-r--r--Src/osmoconbb/src/target/firmware/include/comm/timer.h76
-rw-r--r--Src/osmoconbb/src/target/firmware/include/console.h20
-rw-r--r--Src/osmoconbb/src/target/firmware/include/ctors.h16
-rw-r--r--Src/osmoconbb/src/target/firmware/include/ctype.h54
-rw-r--r--Src/osmoconbb/src/target/firmware/include/debug.h31
-rw-r--r--Src/osmoconbb/src/target/firmware/include/defines.h18
-rw-r--r--Src/osmoconbb/src/target/firmware/include/delay.h7
-rw-r--r--Src/osmoconbb/src/target/firmware/include/display.h48
-rw-r--r--Src/osmoconbb/src/target/firmware/include/display/ssd1783.h56
-rw-r--r--Src/osmoconbb/src/target/firmware/include/flash/cfi_flash.h41
-rw-r--r--Src/osmoconbb/src/target/firmware/include/i2c.h7
-rw-r--r--Src/osmoconbb/src/target/firmware/include/keypad.h66
-rw-r--r--Src/osmoconbb/src/target/firmware/include/layer1/afc.h18
-rw-r--r--Src/osmoconbb/src/target/firmware/include/layer1/agc.h7
-rw-r--r--Src/osmoconbb/src/target/firmware/include/layer1/apc.h10
-rw-r--r--Src/osmoconbb/src/target/firmware/include/layer1/async.h59
-rw-r--r--Src/osmoconbb/src/target/firmware/include/layer1/avg.h23
-rw-r--r--Src/osmoconbb/src/target/firmware/include/layer1/l23_api.h15
-rw-r--r--Src/osmoconbb/src/target/firmware/include/layer1/mframe_sched.h67
-rw-r--r--Src/osmoconbb/src/target/firmware/include/layer1/prim.h34
-rw-r--r--Src/osmoconbb/src/target/firmware/include/layer1/rfch.h9
-rw-r--r--Src/osmoconbb/src/target/firmware/include/layer1/sched_gsmtime.h24
-rw-r--r--Src/osmoconbb/src/target/firmware/include/layer1/sync.h203
-rw-r--r--Src/osmoconbb/src/target/firmware/include/layer1/tdma_sched.h73
-rw-r--r--Src/osmoconbb/src/target/firmware/include/layer1/toa.h10
-rw-r--r--Src/osmoconbb/src/target/firmware/include/layer1/tpu_window.h24
-rw-r--r--Src/osmoconbb/src/target/firmware/include/manifest.h10
-rw-r--r--Src/osmoconbb/src/target/firmware/include/memory.h28
-rw-r--r--Src/osmoconbb/src/target/firmware/include/mtk/bfe.h107
-rw-r--r--Src/osmoconbb/src/target/firmware/include/mtk/bpi.h20
-rw-r--r--Src/osmoconbb/src/target/firmware/include/mtk/bsi.h41
-rw-r--r--Src/osmoconbb/src/target/firmware/include/mtk/emi.h42
-rw-r--r--Src/osmoconbb/src/target/firmware/include/mtk/mt6139.h60
-rw-r--r--Src/osmoconbb/src/target/firmware/include/mtk/mt6235.h74
-rw-r--r--Src/osmoconbb/src/target/firmware/include/mtk/mt6235_sciphone_g2.h38
-rw-r--r--Src/osmoconbb/src/target/firmware/include/mtk/system.h195
-rw-r--r--Src/osmoconbb/src/target/firmware/include/mtk/tdma_timer.h60
-rw-r--r--Src/osmoconbb/src/target/firmware/include/rf/trf6151.h49
-rw-r--r--Src/osmoconbb/src/target/firmware/include/rffe.h35
-rw-r--r--Src/osmoconbb/src/target/firmware/include/spi.h7
-rw-r--r--Src/osmoconbb/src/target/firmware/include/stdint.h36
-rw-r--r--Src/osmoconbb/src/target/firmware/include/stdio.h52
-rw-r--r--Src/osmoconbb/src/target/firmware/include/string.h12
-rw-r--r--Src/osmoconbb/src/target/firmware/include/swab.h297
-rw-r--r--Src/osmoconbb/src/target/firmware/include/uart.h32
-rw-r--r--Src/osmoconbb/src/target/firmware/include/uwire.h7
77 files changed, 0 insertions, 6051 deletions
diff --git a/Src/osmoconbb/src/target/firmware/include/abb/twl3025.h b/Src/osmoconbb/src/target/firmware/include/abb/twl3025.h
deleted file mode 100644
index 2cd35a5..0000000
--- a/Src/osmoconbb/src/target/firmware/include/abb/twl3025.h
+++ /dev/null
@@ -1,136 +0,0 @@
-#ifndef _TWL3025_H
-#define _TWL3025_H
-
-#define PAGE(n) (n << 7)
-enum twl3025_reg {
- VRPCCFG = PAGE(1) | 30,
- VRPCDEV = PAGE(0) | 30,
- VRPCMSK = PAGE(1) | 31,
- VRPCMSKABB = PAGE(1) | 29,
- VRPCSTS = PAGE(0) | 31,
- /* Monitoring ADC Registers */
- MADCTRL = PAGE(0) | 13,
- MADCSTAT = PAGE(0) | 24,
- VBATREG = PAGE(0) | 15,
- VCHGREG = PAGE(0) | 16,
- ICHGREG = PAGE(0) | 17,
- VBKPREG = PAGE(0) | 18,
- ADIN1REG = PAGE(0) | 19,
- ADIN2REG = PAGE(0) | 20,
- ADIN3REG = PAGE(0) | 21,
- ADIN4REG = PAGE(0) | 22,
- /* Clock Generator Registers */
- TOGBR1 = PAGE(0) | 4,
- TOGBR2 = PAGE(0) | 5,
- PWDNRG = PAGE(1) | 9,
- TAPCTRL = PAGE(1) | 19,
- TAPREG = PAGE(1) | 20,
- /* Automatic Frequency Control (AFC) Registers */
- AUXAFC1 = PAGE(0) | 7,
- AUXAFC2 = PAGE(0) | 8,
- AFCCTLADD = PAGE(1) | 21,
- AFCOUT = PAGE(1) | 22,
- /* Automatic Power Control (APC) Registers */
- APCDEL1 = PAGE(0) | 2,
- APCDEL2 = PAGE(1) | 26,
- AUXAPC = PAGE(0) | 9,
- APCRAM = PAGE(0) | 10,
- APCOFF = PAGE(0) | 11,
- APCOUT = PAGE(1) | 12,
- /* Auxiliary DAC Control Register */
- AUXDAC = PAGE(0) | 12,
- /* SimCard Control Register */
- VRPCSIM = PAGE(1) | 23,
- /* LED Driver Register */
- AUXLED = PAGE(1) | 24,
- /* Battery Charger Interface (BCI) Registers */
- CHGREG = PAGE(0) | 25,
- BCICTL1 = PAGE(0) | 28,
- BCICTL2 = PAGE(0) | 29,
- BCICONF = PAGE(1) | 13,
- /* Interrupt and Bus Control (IBIC) Registers */
- ITMASK = PAGE(0) | 28,
- ITSTATREG = PAGE(0) | 27, /* both pages! */
- PAGEREG = PAGE(0) | 1, /* both pages! */
- /* Baseband Codec (BBC) Registers */
- BULIOFF = PAGE(1) | 2,
- BULQOFF = PAGE(1) | 3,
- BULIDAC = PAGE(1) | 5,
- BULQDAC = PAGE(1) | 4,
- BULGCAL = PAGE(1) | 14,
- BULDATA1 = PAGE(0) | 3, /* 16 words */
- BBCTRL = PAGE(1) | 6,
- /* Voiceband Codec (VBC) Registers */
- VBCTRL1 = PAGE(1) | 8,
- VBCTRL2 = PAGE(1) | 11,
- VBPOP = PAGE(1) | 10,
- VBUCTRL = PAGE(1) | 7,
- VBDCTRL = PAGE(0) | 6,
-};
-#define BULDATA2 BULDATA1
-
-enum togbr2_bits {
- TOGBR2_KEEPR = (1 << 0), /* Clear KEEPON bit */
- TOGBR2_KEEPS = (1 << 1), /* Set KEEPON bit */
- TOGBR2_ACTR = (1 << 2), /* Dectivate MCLK */
- TOGBR2_ACTS = (1 << 3), /* Activate MCLK */
- TOGBR2_IBUFPTR1 = (1 << 4), /* Initialize pointer of burst buffer 1 */
- TOGBR2_IBUFPTR2 = (1 << 5), /* Initialize pointer of burst buffer 2 */
- TOGBR2_IAPCPTR = (1 << 6), /* Initialize pointer of APC RAM */
-};
-
-/* How a RAMP value is encoded */
-#define ABB_RAMP_VAL(up, down) ( ((down & 0x1F) << 5) | (up & 0x1F) )
-
-enum twl3025_unit {
- TWL3025_UNIT_AFC,
- TWL3025_UNIT_MAD,
- TWL3025_UNIT_ADA,
- TWL3025_UNIT_VDL,
- TWL3025_UNIT_VUL,
-};
-
-void twl3025_init(void);
-void twl3025_reg_write(uint8_t reg, uint16_t data);
-uint16_t twl3025_reg_read(uint8_t reg);
-
-void twl3025_power_off(void);
-
-void twl3025_clk13m(int enable);
-
-void twl3025_unit_enable(enum twl3025_unit unit, int on);
-
-enum twl3025_tsp_bits {
- BULON = 0x80,
- BULCAL = 0x40,
- BULENA = 0x20,
- BDLON = 0x10,
- BDLCAL = 0x08,
- BDLENA = 0x04,
- STARTADC = 0x02,
-};
-
-extern const uint16_t twl3025_default_ramp[16];
-
-/* Enqueue a TSP signal change via the TPU */
-void twl3025_tsp_write(uint8_t data);
-
-/* Enqueue a series of TSP commands in the TPU to (de)activate the downlink path */
-void twl3025_downlink(int on, int16_t at);
-
-/* Enqueue a series of TSP commands in the TPU to (de)activate the uplink path */
-void twl3025_uplink(int on, int16_t at);
-
-/* Update the AFC DAC value */
-void twl3025_afc_set(int16_t val);
-
-/* Get the AFC DAC value */
-int16_t twl3025_afc_get(void);
-
-/* Get the AFC DAC output value */
-uint8_t twl3025_afcout_get(void);
-
-/* Force a certain static AFC DAC output value */
-void twl3025_afcout_set(uint8_t val);
-
-#endif
diff --git a/Src/osmoconbb/src/target/firmware/include/arm.h b/Src/osmoconbb/src/target/firmware/include/arm.h
deleted file mode 100644
index 272c9c3..0000000
--- a/Src/osmoconbb/src/target/firmware/include/arm.h
+++ /dev/null
@@ -1,7 +0,0 @@
-#ifndef _ARM_H
-#define _ARM_H
-
-void arm_enable_interrupts(void);
-int arm_disable_interrupts(void);
-
-#endif
diff --git a/Src/osmoconbb/src/target/firmware/include/arpa/inet.h b/Src/osmoconbb/src/target/firmware/include/arpa/inet.h
deleted file mode 100644
index 9a4dd5c..0000000
--- a/Src/osmoconbb/src/target/firmware/include/arpa/inet.h
+++ /dev/null
@@ -1,2 +0,0 @@
-/* we have this to make sure libosmocore uses our version of ntohl/htons */
-#include <byteorder.h>
diff --git a/Src/osmoconbb/src/target/firmware/include/asm/assembler.h b/Src/osmoconbb/src/target/firmware/include/asm/assembler.h
deleted file mode 100644
index cd03e98..0000000
--- a/Src/osmoconbb/src/target/firmware/include/asm/assembler.h
+++ /dev/null
@@ -1,113 +0,0 @@
-/*
- * linux/include/asm-arm/assembler.h
- *
- * Copyright (C) 1996-2000 Russell King
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This file contains arm architecture specific defines
- * for the different processors.
- *
- * Do not include any C declarations in this file - it is included by
- * assembler source.
- */
-#ifndef __ASSEMBLY__
-#error "Only include this from assembly code"
-#endif
-
-#include <asm/ptrace.h>
-
-/*
- * Endian independent macros for shifting bytes within registers.
- */
-#ifndef __ARMEB__
-#define pull lsr
-#define push lsl
-#define get_byte_0 lsl #0
-#define get_byte_1 lsr #8
-#define get_byte_2 lsr #16
-#define get_byte_3 lsr #24
-#define put_byte_0 lsl #0
-#define put_byte_1 lsl #8
-#define put_byte_2 lsl #16
-#define put_byte_3 lsl #24
-#else
-#define pull lsl
-#define push lsr
-#define get_byte_0 lsr #24
-#define get_byte_1 lsr #16
-#define get_byte_2 lsr #8
-#define get_byte_3 lsl #0
-#define put_byte_0 lsl #24
-#define put_byte_1 lsl #16
-#define put_byte_2 lsl #8
-#define put_byte_3 lsl #0
-#endif
-
-#define PLD(code...)
-
-#define MODE_USR USR_MODE
-#define MODE_FIQ FIQ_MODE
-#define MODE_IRQ IRQ_MODE
-#define MODE_SVC SVC_MODE
-
-#define DEFAULT_FIQ MODE_FIQ
-
-/*
- * LOADREGS - ldm with PC in register list (eg, ldmfd sp!, {pc})
- */
-#ifdef __STDC__
-#define LOADREGS(cond, base, reglist...)\
- ldm##cond base,reglist
-#else
-#define LOADREGS(cond, base, reglist...)\
- ldm/**/cond base,reglist
-#endif
-
-/*
- * Build a return instruction for this processor type.
- */
-#define RETINSTR(instr, regs...)\
- instr regs
-
-/*
- * Enable and disable interrupts
- */
- .macro disable_irq
- msr cpsr_c, #PSR_I_BIT | SVC_MODE
- .endm
-
- .macro enable_irq
- msr cpsr_c, #SVC_MODE
- .endm
-
-/*
- * Save the current IRQ state and disable IRQs. Note that this macro
- * assumes FIQs are enabled, and that the processor is in SVC mode.
- */
- .macro save_and_disable_irqs, oldcpsr
- mrs \oldcpsr, cpsr
- disable_irq
- .endm
-
-/*
- * Restore interrupt state previously stored in a register. We don't
- * guarantee that this will preserve the flags.
- */
- .macro restore_irqs, oldcpsr
- msr cpsr_c, \oldcpsr
- .endm
-
-/*
- * These two are used to save LR/restore PC over a user-based access.
- * The old 26-bit architecture requires that we do. On 32-bit
- * architecture, we can safely ignore this requirement.
- */
- .macro save_lr
- .endm
-
- .macro restore_pc
- mov pc, lr
- .endm
diff --git a/Src/osmoconbb/src/target/firmware/include/asm/atomic.h b/Src/osmoconbb/src/target/firmware/include/asm/atomic.h
deleted file mode 100644
index 19e8ce6..0000000
--- a/Src/osmoconbb/src/target/firmware/include/asm/atomic.h
+++ /dev/null
@@ -1,106 +0,0 @@
-/*
- * linux/include/asm-arm/atomic.h
- *
- * Copyright (C) 1996 Russell King.
- * Copyright (C) 2002 Deep Blue Solutions Ltd.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#ifndef __ASM_ARM_ATOMIC_H
-#define __ASM_ARM_ATOMIC_H
-
-typedef struct { volatile int counter; } atomic_t;
-
-#define ATOMIC_INIT(i) { (i) }
-
-#define atomic_read(v) ((v)->counter)
-
-#include <asm/system.h>
-#include <asm/compiler.h>
-
-#define atomic_set(v,i) (((v)->counter) = (i))
-
-static inline int atomic_add_return(int i, atomic_t *v)
-{
- unsigned long flags;
- int val;
-
- local_irq_save(flags);
- val = v->counter;
- v->counter = val += i;
- local_irq_restore(flags);
-
- return val;
-}
-
-static inline int atomic_sub_return(int i, atomic_t *v)
-{
- unsigned long flags;
- int val;
-
- local_irq_save(flags);
- val = v->counter;
- v->counter = val -= i;
- local_irq_restore(flags);
-
- return val;
-}
-
-static inline int atomic_cmpxchg(atomic_t *v, int old, int new)
-{
- int ret;
- unsigned long flags;
-
- local_irq_save(flags);
- ret = v->counter;
- if (likely(ret == old))
- v->counter = new;
- local_irq_restore(flags);
-
- return ret;
-}
-
-static inline void atomic_clear_mask(unsigned long mask, unsigned long *addr)
-{
- unsigned long flags;
-
- local_irq_save(flags);
- *addr &= ~mask;
- local_irq_restore(flags);
-}
-
-#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
-
-static inline int atomic_add_unless(atomic_t *v, int a, int u)
-{
- int c, old;
-
- c = atomic_read(v);
- while (c != u && (old = atomic_cmpxchg((v), c, c + a)) != c)
- c = old;
- return c != u;
-}
-#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
-
-#define atomic_add(i, v) (void) atomic_add_return(i, v)
-#define atomic_inc(v) (void) atomic_add_return(1, v)
-#define atomic_sub(i, v) (void) atomic_sub_return(i, v)
-#define atomic_dec(v) (void) atomic_sub_return(1, v)
-
-#define atomic_inc_and_test(v) (atomic_add_return(1, v) == 0)
-#define atomic_dec_and_test(v) (atomic_sub_return(1, v) == 0)
-#define atomic_inc_return(v) (atomic_add_return(1, v))
-#define atomic_dec_return(v) (atomic_sub_return(1, v))
-#define atomic_sub_and_test(i, v) (atomic_sub_return(i, v) == 0)
-
-#define atomic_add_negative(i,v) (atomic_add_return(i, v) < 0)
-
-/* Atomic operations are already serializing on ARM */
-#define smp_mb__before_atomic_dec() barrier()
-#define smp_mb__after_atomic_dec() barrier()
-#define smp_mb__before_atomic_inc() barrier()
-#define smp_mb__after_atomic_inc() barrier()
-
-#endif
diff --git a/Src/osmoconbb/src/target/firmware/include/asm/bitops.h b/Src/osmoconbb/src/target/firmware/include/asm/bitops.h
deleted file mode 100644
index 337d800..0000000
--- a/Src/osmoconbb/src/target/firmware/include/asm/bitops.h
+++ /dev/null
@@ -1,225 +0,0 @@
-/*
- * Copyright 1995, Russell King.
- * Various bits and pieces copyrights include:
- * Linus Torvalds (test_bit).
- * Big endian support: Copyright 2001, Nicolas Pitre
- * reworked by rmk.
- *
- * bit 0 is the LSB of an "unsigned long" quantity.
- *
- * Please note that the code in this file should never be included
- * from user space. Many of these are not implemented in assembler
- * since they would be too costly. Also, they require privileged
- * instructions (which are not available from user mode) to ensure
- * that they are atomic.
- */
-
-#ifndef __ASM_ARM_BITOPS_H
-#define __ASM_ARM_BITOPS_H
-
-#include <asm/system.h>
-
-#define smp_mb__before_clear_bit() mb()
-#define smp_mb__after_clear_bit() mb()
-
-/*
- * These functions are the basis of our bit ops.
- *
- * First, the atomic bitops. These use native endian.
- */
-static inline void ____atomic_set_bit(unsigned int bit, volatile unsigned long *p)
-{
- unsigned long flags;
- unsigned long mask = 1UL << (bit & 31);
-
- p += bit >> 5;
-
- local_irq_save(flags);
- *p |= mask;
- local_irq_restore(flags);
-}
-
-static inline void ____atomic_clear_bit(unsigned int bit, volatile unsigned long *p)
-{
- unsigned long flags;
- unsigned long mask = 1UL << (bit & 31);
-
- p += bit >> 5;
-
- local_irq_save(flags);
- *p &= ~mask;
- local_irq_restore(flags);
-}
-
-static inline void ____atomic_change_bit(unsigned int bit, volatile unsigned long *p)
-{
- unsigned long flags;
- unsigned long mask = 1UL << (bit & 31);
-
- p += bit >> 5;
-
- local_irq_save(flags);
- *p ^= mask;
- local_irq_restore(flags);
-}
-
-static inline int
-____atomic_test_and_set_bit(unsigned int bit, volatile unsigned long *p)
-{
- unsigned long flags;
- unsigned int res;
- unsigned long mask = 1UL << (bit & 31);
-
- p += bit >> 5;
-
- local_irq_save(flags);
- res = *p;
- *p = res | mask;
- local_irq_restore(flags);
-
- return res & mask;
-}
-
-static inline int
-____atomic_test_and_clear_bit(unsigned int bit, volatile unsigned long *p)
-{
- unsigned long flags;
- unsigned int res;
- unsigned long mask = 1UL << (bit & 31);
-
- p += bit >> 5;
-
- local_irq_save(flags);
- res = *p;
- *p = res & ~mask;
- local_irq_restore(flags);
-
- return res & mask;
-}
-
-static inline int
-____atomic_test_and_change_bit(unsigned int bit, volatile unsigned long *p)
-{
- unsigned long flags;
- unsigned int res;
- unsigned long mask = 1UL << (bit & 31);
-
- p += bit >> 5;
-
- local_irq_save(flags);
- res = *p;
- *p = res ^ mask;
- local_irq_restore(flags);
-
- return res & mask;
-}
-
-//#include <asm-generic/bitops/non-atomic.h>
-
-/*
- * A note about Endian-ness.
- * -------------------------
- *
- * When the ARM is put into big endian mode via CR15, the processor
- * merely swaps the order of bytes within words, thus:
- *
- * ------------ physical data bus bits -----------
- * D31 ... D24 D23 ... D16 D15 ... D8 D7 ... D0
- * little byte 3 byte 2 byte 1 byte 0
- * big byte 0 byte 1 byte 2 byte 3
- *
- * This means that reading a 32-bit word at address 0 returns the same
- * value irrespective of the endian mode bit.
- *
- * Peripheral devices should be connected with the data bus reversed in
- * "Big Endian" mode. ARM Application Note 61 is applicable, and is
- * available from http://www.arm.com/.
- *
- * The following assumes that the data bus connectivity for big endian
- * mode has been followed.
- *
- * Note that bit 0 is defined to be 32-bit word bit 0, not byte 0 bit 0.
- */
-
-/*
- * Little endian assembly bitops. nr = 0 -> byte 0 bit 0.
- */
-extern void _set_bit_le(int nr, volatile unsigned long * p);
-extern void _clear_bit_le(int nr, volatile unsigned long * p);
-extern void _change_bit_le(int nr, volatile unsigned long * p);
-extern int _test_and_set_bit_le(int nr, volatile unsigned long * p);
-extern int _test_and_clear_bit_le(int nr, volatile unsigned long * p);
-extern int _test_and_change_bit_le(int nr, volatile unsigned long * p);
-extern int _find_first_zero_bit_le(const void * p, unsigned size);
-extern int _find_next_zero_bit_le(const void * p, int size, int offset);
-extern int _find_first_bit_le(const unsigned long *p, unsigned size);
-extern int _find_next_bit_le(const unsigned long *p, int size, int offset);
-
-/*
- * Big endian assembly bitops. nr = 0 -> byte 3 bit 0.
- */
-extern void _set_bit_be(int nr, volatile unsigned long * p);
-extern void _clear_bit_be(int nr, volatile unsigned long * p);
-extern void _change_bit_be(int nr, volatile unsigned long * p);
-extern int _test_and_set_bit_be(int nr, volatile unsigned long * p);
-extern int _test_and_clear_bit_be(int nr, volatile unsigned long * p);
-extern int _test_and_change_bit_be(int nr, volatile unsigned long * p);
-extern int _find_first_zero_bit_be(const void * p, unsigned size);
-extern int _find_next_zero_bit_be(const void * p, int size, int offset);
-extern int _find_first_bit_be(const unsigned long *p, unsigned size);
-extern int _find_next_bit_be(const unsigned long *p, int size, int offset);
-
-/*
- * The __* form of bitops are non-atomic and may be reordered.
- */
-#define ATOMIC_BITOP_LE(name,nr,p) \
- (__builtin_constant_p(nr) ? \
- ____atomic_##name(nr, p) : \
- _##name##_le(nr,p))
-
-#define ATOMIC_BITOP_BE(name,nr,p) \
- (__builtin_constant_p(nr) ? \
- ____atomic_##name(nr, p) : \
- _##name##_be(nr,p))
-
-#define NONATOMIC_BITOP(name,nr,p) \
- (____nonatomic_##name(nr, p))
-
-/*
- * These are the little endian, atomic definitions.
- */
-#define set_bit(nr,p) ATOMIC_BITOP_LE(set_bit,nr,p)
-#define clear_bit(nr,p) ATOMIC_BITOP_LE(clear_bit,nr,p)
-#define change_bit(nr,p) ATOMIC_BITOP_LE(change_bit,nr,p)
-#define test_and_set_bit(nr,p) ATOMIC_BITOP_LE(test_and_set_bit,nr,p)
-#define test_and_clear_bit(nr,p) ATOMIC_BITOP_LE(test_and_clear_bit,nr,p)
-#define test_and_change_bit(nr,p) ATOMIC_BITOP_LE(test_and_change_bit,nr,p)
-#define find_first_zero_bit(p,sz) _find_first_zero_bit_le(p,sz)
-#define find_next_zero_bit(p,sz,off) _find_next_zero_bit_le(p,sz,off)
-#define find_first_bit(p,sz) _find_first_bit_le(p,sz)
-#define find_next_bit(p,sz,off) _find_next_bit_le(p,sz,off)
-
-#define WORD_BITOFF_TO_LE(x) ((x))
-
-#if 0
-#include <asm-generic/bitops/ffz.h>
-#include <asm-generic/bitops/__ffs.h>
-#include <asm-generic/bitops/fls.h>
-#include <asm-generic/bitops/ffs.h>
-
-#include <asm-generic/bitops/fls64.h>
-
-#include <asm-generic/bitops/sched.h>
-#include <asm-generic/bitops/hweight.h>
-#endif
-
-#define BITS_PER_LONG 32
-#define BITOP_MASK(nr) (1UL << ((nr) % BITS_PER_LONG))
-#define BITOP_WORD(nr) ((nr) / BITS_PER_LONG)
-
-static inline int test_bit(int nr, const volatile unsigned long *addr)
-{
- return 1UL & (addr[BITOP_WORD(nr)] >> (nr & (BITS_PER_LONG-1)));
-}
-
-#endif /* _ARM_BITOPS_H */
diff --git a/Src/osmoconbb/src/target/firmware/include/asm/div64.h b/Src/osmoconbb/src/target/firmware/include/asm/div64.h
deleted file mode 100644
index 3682616..0000000
--- a/Src/osmoconbb/src/target/firmware/include/asm/div64.h
+++ /dev/null
@@ -1,48 +0,0 @@
-#ifndef __ASM_ARM_DIV64
-#define __ASM_ARM_DIV64
-
-#include <asm/system.h>
-
-/*
- * The semantics of do_div() are:
- *
- * uint32_t do_div(uint64_t *n, uint32_t base)
- * {
- * uint32_t remainder = *n % base;
- * *n = *n / base;
- * return remainder;
- * }
- *
- * In other words, a 64-bit dividend with a 32-bit divisor producing
- * a 64-bit result and a 32-bit remainder. To accomplish this optimally
- * we call a special __do_div64 helper with completely non standard
- * calling convention for arguments and results (beware).
- */
-
-#ifdef __ARMEB__
-#define __xh "r0"
-#define __xl "r1"
-#else
-#define __xl "r0"
-#define __xh "r1"
-#endif
-
-#define do_div(n,base) \
-({ \
- register unsigned int __base asm("r4") = base; \
- register unsigned long long __n asm("r0") = n; \
- register unsigned long long __res asm("r2"); \
- register unsigned int __rem asm(__xh); \
- asm( __asmeq("%0", __xh) \
- __asmeq("%1", "r2") \
- __asmeq("%2", "r0") \
- __asmeq("%3", "r4") \
- "bl __do_div64" \
- : "=r" (__rem), "=r" (__res) \
- : "r" (__n), "r" (__base) \
- : "ip", "lr", "cc"); \
- n = __res; \
- __rem; \
-})
-
-#endif
diff --git a/Src/osmoconbb/src/target/firmware/include/asm/linkage.h b/Src/osmoconbb/src/target/firmware/include/asm/linkage.h
deleted file mode 100644
index ac1c900..0000000
--- a/Src/osmoconbb/src/target/firmware/include/asm/linkage.h
+++ /dev/null
@@ -1,18 +0,0 @@
-#ifndef __ASM_LINKAGE_H
-#define __ASM_LINKAGE_H
-
-/* asm-arm/linkage.h */
-
-#define __ALIGN .align 0
-#define __ALIGN_STR ".align 0"
-
-/* linux/linkage.h */
-
-#define ALIGN __ALIGN
-
-#define ENTRY(name) \
- .globl name; \
- ALIGN; \
- name:
-
-#endif
diff --git a/Src/osmoconbb/src/target/firmware/include/asm/ptrace.h b/Src/osmoconbb/src/target/firmware/include/asm/ptrace.h
deleted file mode 100644
index f3a654e..0000000
--- a/Src/osmoconbb/src/target/firmware/include/asm/ptrace.h
+++ /dev/null
@@ -1,128 +0,0 @@
-/*
- * linux/include/asm-arm/ptrace.h
- *
- * Copyright (C) 1996-2003 Russell King
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#ifndef __ASM_ARM_PTRACE_H
-#define __ASM_ARM_PTRACE_H
-
-/*
- * PSR bits
- */
-#define USR26_MODE 0x00000000
-#define FIQ26_MODE 0x00000001
-#define IRQ26_MODE 0x00000002
-#define SVC26_MODE 0x00000003
-#define USR_MODE 0x00000010
-#define FIQ_MODE 0x00000011
-#define IRQ_MODE 0x00000012
-#define SVC_MODE 0x00000013
-#define ABT_MODE 0x00000017
-#define UND_MODE 0x0000001b
-#define SYSTEM_MODE 0x0000001f
-#define MODE32_BIT 0x00000010
-#define MODE_MASK 0x0000001f
-#define PSR_T_BIT 0x00000020
-#define PSR_F_BIT 0x00000040
-#define PSR_I_BIT 0x00000080
-#define PSR_J_BIT 0x01000000
-#define PSR_Q_BIT 0x08000000
-#define PSR_V_BIT 0x10000000
-#define PSR_C_BIT 0x20000000
-#define PSR_Z_BIT 0x40000000
-#define PSR_N_BIT 0x80000000
-#define PCMASK 0
-
-/*
- * Groups of PSR bits
- */
-#define PSR_f 0xff000000 /* Flags */
-#define PSR_s 0x00ff0000 /* Status */
-#define PSR_x 0x0000ff00 /* Extension */
-#define PSR_c 0x000000ff /* Control */
-
-#ifndef __ASSEMBLY__
-
-/*
- * This struct defines the way the registers are stored on the
- * stack during a system call. Note that sizeof(struct pt_regs)
- * has to be a multiple of 8.
- */
-struct pt_regs {
- long uregs[18];
-};
-
-#define ARM_cpsr uregs[16]
-#define ARM_pc uregs[15]
-#define ARM_lr uregs[14]
-#define ARM_sp uregs[13]
-#define ARM_ip uregs[12]
-#define ARM_fp uregs[11]
-#define ARM_r10 uregs[10]
-#define ARM_r9 uregs[9]
-#define ARM_r8 uregs[8]
-#define ARM_r7 uregs[7]
-#define ARM_r6 uregs[6]
-#define ARM_r5 uregs[5]
-#define ARM_r4 uregs[4]
-#define ARM_r3 uregs[3]
-#define ARM_r2 uregs[2]
-#define ARM_r1 uregs[1]
-#define ARM_r0 uregs[0]
-#define ARM_ORIG_r0 uregs[17]
-
-#define user_mode(regs) \
- (((regs)->ARM_cpsr & 0xf) == 0)
-
-#ifdef CONFIG_ARM_THUMB
-#define thumb_mode(regs) \
- (((regs)->ARM_cpsr & PSR_T_BIT))
-#else
-#define thumb_mode(regs) (0)
-#endif
-
-#define processor_mode(regs) \
- ((regs)->ARM_cpsr & MODE_MASK)
-
-#define interrupts_enabled(regs) \
- (!((regs)->ARM_cpsr & PSR_I_BIT))
-
-#define fast_interrupts_enabled(regs) \
- (!((regs)->ARM_cpsr & PSR_F_BIT))
-
-#define condition_codes(regs) \
- ((regs)->ARM_cpsr & (PSR_V_BIT|PSR_C_BIT|PSR_Z_BIT|PSR_N_BIT))
-
-/* Are the current registers suitable for user mode?
- * (used to maintain security in signal handlers)
- */
-static inline int valid_user_regs(struct pt_regs *regs)
-{
- if (user_mode(regs) &&
- (regs->ARM_cpsr & (PSR_F_BIT|PSR_I_BIT)) == 0)
- return 1;
-
- /*
- * Force CPSR to something logical...
- */
- regs->ARM_cpsr &= PSR_f | PSR_s | PSR_x | PSR_T_BIT | MODE32_BIT;
-
- return 0;
-}
-
-#define pc_pointer(v) \
- ((v) & ~PCMASK)
-
-#define instruction_pointer(regs) \
- (pc_pointer((regs)->ARM_pc))
-
-#define profile_pc(regs) instruction_pointer(regs)
-
-#endif /* __ASSEMBLY__ */
-
-#endif
-
diff --git a/Src/osmoconbb/src/target/firmware/include/asm/swab.h b/Src/osmoconbb/src/target/firmware/include/asm/swab.h
deleted file mode 100644
index 4640e27..0000000
--- a/Src/osmoconbb/src/target/firmware/include/asm/swab.h
+++ /dev/null
@@ -1,45 +0,0 @@
-/*
- * arch/arm/include/asm/byteorder.h
- *
- * ARM Endian-ness. In little endian mode, the data bus is connected such
- * that byte accesses appear as:
- * 0 = d0...d7, 1 = d8...d15, 2 = d16...d23, 3 = d24...d31
- * and word accesses (data or instruction) appear as:
- * d0...d31
- *
- * When in big endian mode, byte accesses appear as:
- * 0 = d24...d31, 1 = d16...d23, 2 = d8...d15, 3 = d0...d7
- * and word accesses (data or instruction) appear as:
- * d0...d31
- */
-#ifndef __ASM_ARM_SWAB_H
-#define __ASM_ARM_SWAB_H
-
-#include <stdint.h>
-#include <defines.h>
-
-static inline uint32_t __arch_swab32(uint32_t x)
-{
- uint32_t t;
-
-#ifndef __thumb__
- if (!__builtin_constant_p(x)) {
- /*
- * The compiler needs a bit of a hint here to always do the
- * right thing and not screw it up to different degrees
- * depending on the gcc version.
- */
- asm ("eor\t%0, %1, %1, ror #16" : "=r" (t) : "r" (x));
- } else
-#endif
- t = x ^ ((x << 16) | (x >> 16)); /* eor r1,r0,r0,ror #16 */
-
- x = (x << 24) | (x >> 8); /* mov r0,r0,ror #8 */
- t &= ~0x00FF0000; /* bic r1,r1,#0x00FF0000 */
- x ^= (t >> 8); /* eor r0,r0,r1,lsr #8 */
-
- return x;
-}
-#define __arch_swab32 __arch_swab32
-
-#endif
diff --git a/Src/osmoconbb/src/target/firmware/include/asm/system.h b/Src/osmoconbb/src/target/firmware/include/asm/system.h
deleted file mode 100644
index 3db0dc7..0000000
--- a/Src/osmoconbb/src/target/firmware/include/asm/system.h
+++ /dev/null
@@ -1,123 +0,0 @@
-#ifndef __ASM_ARM_SYSTEM_H
-#define __ASM_ARM_SYSTEM_H
-
-/* Generic ARM7TDMI (ARMv4T) synchronisation primitives, mostly
- * taken from Linux kernel source, licensed under GPL */
-
-#define local_irq_save(x) \
- ({ \
- unsigned long temp; \
- (void) (&temp == &x); \
- __asm__ __volatile__( \
- "mrs %0, cpsr @ local_irq_save\n" \
-" orr %1, %0, #128\n" \
-" msr cpsr_c, %1" \
- : "=r" (x), "=r" (temp) \
- : \
- : "memory", "cc"); \
- })
-
-/* Save IRQ flags and disable FIQ + IRQ */
-#define local_firq_save(x) \
- ({ \
- unsigned long temp; \
- (void) (&temp == &x); \
- __asm__ __volatile__( \
- "mrs %0, cpsr @ local_firq_save\n" \
-" orr %1, %0, #0xC0\n" \
-" msr cpsr_c, %1" \
- : "=r" (x), "=r" (temp) \
- : \
- : "memory", "cc"); \
- })
-
-/*
- * Enable IRQs
- */
-#define local_irq_enable() \
- ({ \
- unsigned long temp; \
- __asm__ __volatile__( \
- "mrs %0, cpsr @ local_irq_enable\n" \
-" bic %0, %0, #128\n" \
-" msr cpsr_c, %0" \
- : "=r" (temp) \
- : \
- : "memory", "cc"); \
- })
-
-/*
- * Disable IRQs
- */
-#define local_irq_disable() \
- ({ \
- unsigned long temp; \
- __asm__ __volatile__( \
- "mrs %0, cpsr @ local_irq_disable\n" \
-" orr %0, %0, #128\n" \
-" msr cpsr_c, %0" \
- : "=r" (temp) \
- : \
- : "memory", "cc"); \
- })
-
-/*
- * Enable FIQs
- */
-#define local_fiq_enable() \
- ({ \
- unsigned long temp; \
- __asm__ __volatile__( \
- "mrs %0, cpsr @ stf\n" \
-" bic %0, %0, #64\n" \
-" msr cpsr_c, %0" \
- : "=r" (temp) \
- : \
- : "memory", "cc"); \
- })
-
-/*
- * Disable FIQs
- */
-#define local_fiq_disable() \
- ({ \
- unsigned long temp; \
- __asm__ __volatile__( \
- "mrs %0, cpsr @ clf\n" \
-" orr %0, %0, #64\n" \
-" msr cpsr_c, %0" \
- : "=r" (temp) \
- : \
- : "memory", "cc"); \
- })
-
-/*
- * Save the current interrupt enable state.
- */
-#define local_save_flags(x) \
- ({ \
- __asm__ __volatile__( \
- "mrs %0, cpsr @ local_save_flags" \
- : "=r" (x) : : "memory", "cc"); \
- })
-
-/*
- * restore saved IRQ & FIQ state
- */
-#define local_irq_restore(x) \
- __asm__ __volatile__( \
- "msr cpsr_c, %0 @ local_irq_restore\n" \
- : \
- : "r" (x) \
- : "memory", "cc")
-
-#define irqs_disabled() \
-({ \
- unsigned long flags; \
- local_save_flags(flags); \
- (int)(flags & PSR_I_BIT); \
-})
-
-#define __asmeq(x, y) ".ifnc " x "," y " ; .err ; .endif\n\t"
-
-#endif
diff --git a/Src/osmoconbb/src/target/firmware/include/board.h b/Src/osmoconbb/src/target/firmware/include/board.h
deleted file mode 100644
index 9783ef3..0000000
--- a/Src/osmoconbb/src/target/firmware/include/board.h
+++ /dev/null
@@ -1,8 +0,0 @@
-#ifndef _BOARD_H
-#define _BOARD_H
-
-extern const char *target_board;
-
-void board_init(void);
-
-#endif /* _BOARD_H */
diff --git a/Src/osmoconbb/src/target/firmware/include/byteorder.h b/Src/osmoconbb/src/target/firmware/include/byteorder.h
deleted file mode 100644
index 41edb93..0000000
--- a/Src/osmoconbb/src/target/firmware/include/byteorder.h
+++ /dev/null
@@ -1,79 +0,0 @@
-#ifndef _LINUX_BYTEORDER_LITTLE_ENDIAN_H
-#define _LINUX_BYTEORDER_LITTLE_ENDIAN_H
-
-#ifndef __LITTLE_ENDIAN
-#define __LITTLE_ENDIAN 1234
-#endif
-#ifndef __LITTLE_ENDIAN_BITFIELD
-#define __LITTLE_ENDIAN_BITFIELD
-#endif
-
-#include <stdint.h>
-#include <swab.h>
-
-#define __constant_htonl(x) ___constant_swab32(x)
-#define __constant_ntohl(x) ___constant_swab32(x)
-#define __constant_htons(x) ___constant_swab16(x)
-#define __constant_ntohs(x) ___constant_swab16(x)
-#define __constant_cpu_to_le64(x) (x)
-#define __constant_le64_to_cpu(x) (x)
-#define __constant_cpu_to_le32(x) (x)
-#define __constant_le32_to_cpu(x) (x)
-#define __constant_cpu_to_le16(x) (x)
-#define __constant_le16_to_cpu(x) (x)
-#define __constant_cpu_to_be64(x) ___constant_swab64(x)
-#define __constant_be64_to_cpu(x) ___constant_swab64(x)
-#define __constant_cpu_to_be32(x) ___constant_swab32(x)
-#define __constant_be32_to_cpu(x) ___constant_swab32(x)
-#define __constant_cpu_to_be16(x) ___constant_swab16(x)
-#define __constant_be16_to_cpu(x) ___constant_swab16(x)
-#define __cpu_to_le64(x) (x)
-#define __le64_to_cpu(x) (x)
-#define __cpu_to_le32(x) (x)
-#define __le32_to_cpu(x) (x)
-#define __cpu_to_le16(x) (x)
-#define __le16_to_cpu(x) (x)
-#define __cpu_to_be64(x) __swab64(x)
-#define __be64_to_cpu(x) __swab64(x)
-#define __cpu_to_be32(x) __swab32(x)
-#define __be32_to_cpu(x) __swab32(x)
-#define __cpu_to_be16(x) __swab16(x)
-#define __be16_to_cpu(x) __swab16(x)
-
-/* from include/linux/byteorder/generic.h */
-#define cpu_to_le64 __cpu_to_le64
-#define le64_to_cpu __le64_to_cpu
-#define cpu_to_le32 __cpu_to_le32
-#define le32_to_cpu __le32_to_cpu
-#define cpu_to_le16 __cpu_to_le16
-#define le16_to_cpu __le16_to_cpu
-#define cpu_to_be64 __cpu_to_be64
-#define be64_to_cpu __be64_to_cpu
-#define cpu_to_be32 __cpu_to_be32
-#define be32_to_cpu __be32_to_cpu
-#define cpu_to_be16 __cpu_to_be16
-#define be16_to_cpu __be16_to_cpu
-
-/*
- * They have to be macros in order to do the constant folding
- * correctly - if the argument passed into a inline function
- * it is no longer constant according to gcc..
- */
-
-#undef ntohl
-#undef ntohs
-#undef htonl
-#undef htons
-
-#define ___htonl(x) __cpu_to_be32(x)
-#define ___htons(x) __cpu_to_be16(x)
-#define ___ntohl(x) __be32_to_cpu(x)
-#define ___ntohs(x) __be16_to_cpu(x)
-
-#define htonl(x) ___htonl(x)
-#define ntohl(x) ___ntohl(x)
-#define htons(x) ___htons(x)
-#define ntohs(x) ___ntohs(x)
-
-
-#endif /* _LINUX_BYTEORDER_LITTLE_ENDIAN_H */
diff --git a/Src/osmoconbb/src/target/firmware/include/calypso/backlight.h b/Src/osmoconbb/src/target/firmware/include/calypso/backlight.h
deleted file mode 100644
index 3a6abd5..0000000
--- a/Src/osmoconbb/src/target/firmware/include/calypso/backlight.h
+++ /dev/null
@@ -1,10 +0,0 @@
-#ifndef _CAL_BACKLIGHT_H
-#define _CAL_BACKLIGHT_H
-
-/* Switch backlight to PWL mode (or back) */
-void bl_mode_pwl(int on);
-
-/* Set the backlight level */
-void bl_level(uint8_t level);
-
-#endif /* CAL_BACKLIGHT_H */
diff --git a/Src/osmoconbb/src/target/firmware/include/calypso/buzzer.h b/Src/osmoconbb/src/target/firmware/include/calypso/buzzer.h
deleted file mode 100644
index dcfd3a3..0000000
--- a/Src/osmoconbb/src/target/firmware/include/calypso/buzzer.h
+++ /dev/null
@@ -1,34 +0,0 @@
-#ifndef _CAL_BUZZER_H
-#define _CAL_BUZZER_H
-
-#define NOTE(n,oct) (n<<2 | (oct & 0x03))
-
-#define NOTE_E 0x00
-#define NOTE_DIS 0x01
-#define NOTE_D 0x02
-#define NOTE_CIS 0x03
-#define NOTE_C 0x04
-#define NOTE_H 0x05
-#define NOTE_AIS 0x06
-#define NOTE_A 0x07
-#define NOTE_GIS 0x08
-#define NOTE_G 0x09
-#define NOTE_FIS 0x0A
-#define NOTE_F 0x0B
-
-#define OCTAVE_5 OCTAVE(0x00)
-#define OCTAVE_4 OCTAVE(0x01)
-#define OCTAVE_3 OCTAVE(0x02)
-#define OCTAVE_2 OCTAVE(0x03)
-#define OCTAVE_1 OCTAVE(0x04)
-
-#define OCTAVE(m) (m>NOTE_C?m+1:m)
-
-/* Switch buzzer to PWT mode (or back) */
-void buzzer_mode_pwt(int on);
-/* Set the buzzer level */
-void buzzer_volume(uint8_t level);
-/* Set the buzzer note */
-void buzzer_note(uint8_t note);
-
-#endif /* _CAL_BUZZER_H */
diff --git a/Src/osmoconbb/src/target/firmware/include/calypso/clock.h b/Src/osmoconbb/src/target/firmware/include/calypso/clock.h
deleted file mode 100644
index abcfde1..0000000
--- a/Src/osmoconbb/src/target/firmware/include/calypso/clock.h
+++ /dev/null
@@ -1,67 +0,0 @@
-#ifndef _CALYPSO_CLK_H
-#define _CALYPSO_CLK_H
-
-#include <stdint.h>
-
-#define CALYPSO_PLL26_52_MHZ ((2 << 8) | 0)
-#define CALYPSO_PLL26_86_7_MHZ ((10 << 8) | 2)
-#define CALYPSO_PLL26_87_MHZ ((3 << 8) | 0)
-#define CALYPSO_PLL13_104_MHZ ((8 << 8) | 0)
-
-enum mclk_div {
- _ARM_MCLK_DIV_1 = 0,
- ARM_MCLK_DIV_1 = 1,
- ARM_MCLK_DIV_2 = 2,
- ARM_MCLK_DIV_3 = 3,
- ARM_MCLK_DIV_4 = 4,
- ARM_MCLK_DIV_5 = 5,
- ARM_MCLK_DIV_6 = 6,
- ARM_MCLK_DIV_7 = 7,
- ARM_MCLK_DIV_1_5 = 0x80 | 1,
- ARM_MCLK_DIV_2_5 = 0x80 | 2,
-};
-
-void calypso_clock_set(uint8_t vtcxo_div2, uint16_t inp, enum mclk_div mclk_div);
-void calypso_pll_set(uint16_t inp);
-void calypso_clk_dump(void);
-
-/* CNTL_RST */
-enum calypso_rst {
- RESET_DSP = (1 << 1),
- RESET_EXT = (1 << 2),
- RESET_WDOG = (1 << 3),
-};
-
-void calypso_reset_set(enum calypso_rst calypso_rst, int active);
-int calypso_reset_get(enum calypso_rst);
-
-enum calypso_bank {
- CALYPSO_nCS0 = 0,
- CALYPSO_nCS1 = 2,
- CALYPSO_nCS2 = 4,
- CALYPSO_nCS3 = 6,
- CALYPSO_nCS7 = 8,
- CALYPSO_CS4 = 0xa,
- CALYPSO_nCS6 = 0xc,
-};
-
-enum calypso_mem_width {
- CALYPSO_MEM_8bit = 0,
- CALYPSO_MEM_16bit = 1,
- CALYPSO_MEM_32bit = 2,
-};
-
-void calypso_mem_cfg(enum calypso_bank bank, uint8_t ws,
- enum calypso_mem_width width, int we);
-
-/* Enable or disable the internal bootrom mapped to 0x0000'0000 */
-void calypso_bootrom(int enable);
-
-/* Enable or disable the debug unit */
-void calypso_debugunit(int enable);
-
-/* configure the RHEA bus bridge[s] */
-void calypso_rhea_cfg(uint8_t fac0, uint8_t fac1, uint8_t timeout,
- uint8_t ws_h, uint8_t ws_l, uint8_t w_en0, uint8_t w_en1);
-
-#endif /* _CALYPSO_CLK_H */
diff --git a/Src/osmoconbb/src/target/firmware/include/calypso/dma.h b/Src/osmoconbb/src/target/firmware/include/calypso/dma.h
deleted file mode 100644
index 00b9bde..0000000
--- a/Src/osmoconbb/src/target/firmware/include/calypso/dma.h
+++ /dev/null
@@ -1,6 +0,0 @@
-#ifndef _CALYPSO_DMA_H
-#define _CALYPSO_DMA_H
-
-void dma_init(void);
-
-#endif /* _CALYPSO_DMA_H */
diff --git a/Src/osmoconbb/src/target/firmware/include/calypso/dsp.h b/Src/osmoconbb/src/target/firmware/include/calypso/dsp.h
deleted file mode 100644
index e4801cb..0000000
--- a/Src/osmoconbb/src/target/firmware/include/calypso/dsp.h
+++ /dev/null
@@ -1,41 +0,0 @@
-#ifndef _CALYPSO_DSP_H
-#define _CALYPSO_DSP_H
-
-#include <calypso/dsp_api.h>
-
-#define CAL_DSP_TGT_BB_LVL 80
-
-struct gsm_time;
-
-struct dsp_api {
- T_NDB_MCU_DSP *ndb;
- T_DB_DSP_TO_MCU *db_r;
- T_DB_MCU_TO_DSP *db_w;
- T_PARAM_MCU_DSP *param;
- int r_page;
- int w_page;
- int r_page_used;
- int frame_ctr;
-};
-
-extern struct dsp_api dsp_api;
-
-void dsp_power_on(void);
-void dsp_dump_version(void);
-void dsp_dump(void);
-void dsp_checksum_task(void);
-void dsp_api_memset(uint16_t *ptr, int octets);
-void dsp_memcpy_to_api(volatile uint16_t *dsp_buf, const uint8_t *mcu_buf, int n, int be);
-void dsp_memcpy_from_api(uint8_t *mcu_buf, const volatile uint16_t *dsp_buf, int n, int be);
-void dsp_load_afc_dac(uint16_t afc);
-void dsp_load_apc_dac(uint16_t apc);
-void dsp_load_tch_param(struct gsm_time *next_time,
- uint8_t chan_mode, uint8_t chan_type, uint8_t chan_sub,
- uint8_t tch_loop, uint8_t sync_tch, uint8_t tn);
-void dsp_load_ciph_param(int mode, uint8_t *key);
-void dsp_end_scenario(void);
-
-void dsp_load_rx_task(uint16_t task, uint8_t burst_id, uint8_t tsc);
-void dsp_load_tx_task(uint16_t task, uint8_t burst_id, uint8_t tsc);
-
-#endif
diff --git a/Src/osmoconbb/src/target/firmware/include/calypso/dsp_api.h b/Src/osmoconbb/src/target/firmware/include/calypso/dsp_api.h
deleted file mode 100644
index f9751f3..0000000
--- a/Src/osmoconbb/src/target/firmware/include/calypso/dsp_api.h
+++ /dev/null
@@ -1,1560 +0,0 @@
-#ifndef _CAL_DSP_API_H
-#define _CAL_DSP_API_H
-
-/* This is a header file with structures imported from the TSM30 source code (l1_defty.h)
- *
- * As this header file only is a list of definitions and data structures, it is
- * not ocnsidered to be a copyrightable work itself.
- *
- * Nonetheless, it might be good to rewrite it (without ugly typedefs!) */
-
-#if(L1_DYN_DSP_DWNLD == 1)
- #include "l1_dyn_dwl_defty.h"
-#endif
-
-/* Include a header file that defines everything this l1_defty.h needs */
-#include "l1_environment.h"
-
-#define BASE_API_NDB 0xFFD001A8L /* 268 words */
-#define BASE_API_PARAM 0xFFD00862L /* 57 words */
-#define BASE_API_R_PAGE_0 0xFFD00050L /* 20 words */
-#define BASE_API_R_PAGE_1 0xFFD00078L /* 20 words */
-#define BASE_API_W_PAGE_0 0xFFD00000L /* 20 words */
-#define BASE_API_W_PAGE_1 0xFFD00028L /* 20 words */
-
-
-/***********************************************************/
-/* */
-/* Data structure for global info components. */
-/* */
-/***********************************************************/
-
-typedef struct
-{
- API d_task_d; // (0) Downlink task command.
- API d_burst_d; // (1) Downlink burst identifier.
- API d_task_u; // (2) Uplink task command.
- API d_burst_u; // (3) Uplink burst identifier.
- API d_task_md; // (4) Downlink Monitoring (FB/SB) command.
-#if (DSP == 33) || (DSP == 34) || (DSP == 35) || (DSP == 36)
- API d_background; // (5) Background tasks
-#else
- API d_reserved; // (5) Reserved
-#endif
- API d_debug; // (6) Debug/Acknowledge/general purpose word.
- API d_task_ra; // (7) RA task command.
- API d_fn; // (8) FN, in Rep. period and FN%104, used for TRAFFIC/TCH only.
- // bit [0..7] -> b_fn_report, FN in the normalized reporting period.
- // bit [8..15] -> b_fn_sid, FN % 104, used for SID positionning.
- API d_ctrl_tch; // (9) Tch channel description.
- // bit [0..3] -> b_chan_mode, channel mode.
- // bit [4..5] -> b_chan_type, channel type.
- // bit [6] -> reset SACCH
- // bit [7] -> vocoder ON
- // bit [8] -> b_sync_tch_ul, synchro. TCH/UL.
- // bit [9] -> b_sync_tch_dl, synchro. TCH/DL.
- // bit [10] -> b_stop_tch_ul, stop TCH/UL.
- // bit [11] -> b_stop_tch_dl, stop TCH/DL.
- // bit [12.13] -> b_tch_loop, tch loops A/B/C.
- API hole; // (10) unused hole.
-
-#if ((ANLG_FAM == 1) || (ANLG_FAM == 2) || (ANLG_FAM == 3))
- API d_ctrl_abb; // (11) Bit field indicating the analog baseband register to send.
- // bit [0] -> b_ramp: the ramp information(a_ramp[]) is located in NDB
- // bit [1.2] -> unused
- // bit [3] -> b_apcdel: delays-register in NDB
- // bit [4] -> b_afc: freq control register in DB
- // bit [5..15] -> unused
-#endif
- API a_a5fn[2]; // (12..13) Encryption Frame number.
- // word 0, bit [0..4] -> T2.
- // word 0, bit [5..10] -> T3.
- // word 1, bit [0..11] -> T1.
- API d_power_ctl; // (14) Power level control.
- API d_afc; // (15) AFC value (enabled by "b_afc" in "d_ctrl_TCM4400 or in d_ctrl_abb").
- API d_ctrl_system; // (16) Controle Register for RESET/RESUME.
- // bit [0..2] -> b_tsq, training sequence.
- // bit [3] -> b_bcch_freq_ind, BCCH frequency indication.
- // bit [15] -> b_task_abort, DSP task abort command.
-}
-T_DB_MCU_TO_DSP;
-
-typedef struct
-{
- API d_task_d; // (0) Downlink task command.
- API d_burst_d; // (1) Downlink burst identifier.
- API d_task_u; // (2) Uplink task command.
- API d_burst_u; // (3) Uplink burst identifier.
- API d_task_md; // (4) Downlink Monitoring (FB/SB) task command.
-#if (DSP == 33) || (DSP == 34) || (DSP == 35) || (DSP == 36)
- API d_background; // (5) Background tasks
-#else
- API d_reserved; // (5) Reserved
-#endif
- API d_debug; // (6) Debug/Acknowledge/general purpose word.
- API d_task_ra; // (7) RA task command.
-
-#if (DSP == 33) || (DSP == 34) || (DSP == 35) || (DSP == 36)
- API a_serv_demod[4]; // ( 8..11) Serv. cell demod. result, array of 4 words (D_TOA,D_PM,D_ANGLE,D_SNR).
- API a_pm[3]; // (12..14) Power measurement results, array of 3 words.
- API a_sch[5]; // (15..19) Header + SB information, array of 5 words.
-#else
- API a_pm[3]; // ( 8..10) Power measurement results, array of 3 words.
- API a_serv_demod[4]; // (11..14) Serv. cell demod. result, array of 4 words (D_TOA,D_PM,D_ANGLE,D_SNR).
- API a_sch[5]; // (15..19) Header + SB information, array of 5 words.
-#endif
-}
-T_DB_DSP_TO_MCU;
-
-#if (DSP == 34) || (DSP == 35) || (DSP == 36) // NDB GSM
- typedef struct
- {
- // MISC Tasks
- API d_dsp_page;
-
- // DSP status returned (DSP --> MCU).
- API d_error_status;
-
- // RIF control (MCU -> DSP).
- API d_spcx_rif;
-
- API d_tch_mode; // TCH mode register.
- // bit [0..1] -> b_dai_mode.
- // bit [2] -> b_dtx.
-
- API d_debug1; // bit 0 at 1 enable dsp f_tx delay for Omega
-
- API d_dsp_test;
-
- // Words dedicated to Software version (DSP code + Patch)
- API d_version_number1;
- API d_version_number2;
-
- API d_debug_ptr;
- API d_debug_bk;
-
- API d_pll_config;
-
- // GSM/GPRS DSP Debug trace support
- API p_debug_buffer;
- API d_debug_buffer_size;
- API d_debug_trace_type;
-
- #if (W_A_DSP_IDLE3 == 1)
- // DSP report its state: 0 run, 1 Idle1, 2 Idle2, 3 Idle3.
- API d_dsp_state;
- // 5 words are reserved for any possible mapping modification
- API d_hole1_ndb[2];
- #else
- // 6 words are reserved for any possible mapping modification
- API d_hole1_ndb[3];
- #endif
-
- #if (AMR == 1)
- API p_debug_amr;
- #else
- API d_hole_debug_amr;
- #endif
-
- #if (CHIPSET == 12)
- #if (DSP == 35) || (DSP == 36)
- API d_hole2_ndb[1];
- API d_mcsi_select;
- #else
- API d_hole2_ndb[2];
- #endif
- #else
- API d_hole2_ndb[2];
- #endif
-
- // New words APCDEL1 and APCDEL2 for 2TX: TX/PRACH combinations
- API d_apcdel1_bis;
- API d_apcdel2_bis;
-
-
- // New registers due to IOTA analog base band
- API d_apcdel2;
- API d_vbctrl2;
- API d_bulgcal;
-
- // Analog Based Band
- API d_afcctladd;
-
- API d_vbuctrl;
- API d_vbdctrl;
- API d_apcdel1;
- API d_apcoff;
- API d_bulioff;
- API d_bulqoff;
- API d_dai_onoff;
- API d_auxdac;
-
- #if (ANLG_FAM == 1)
- API d_vbctrl;
- #elif ((ANLG_FAM == 2) || (ANLG_FAM == 3))
- API d_vbctrl1;
- #endif
-
- API d_bbctrl;
-
- // Monitoring tasks control (MCU <- DSP)
- // FB task
- API d_fb_det; // FB detection result. (1 for FOUND).
- API d_fb_mode; // Mode for FB detection algorithm.
- API a_sync_demod[4]; // FB/SB demod. result, (D_TOA,D_PM,D_ANGLE,D_SNR).
-
- // SB Task
- API a_sch26[5]; // Header + SB information, array of 5 words.
-
- API d_audio_gain_ul;
- API d_audio_gain_dl;
-
- // Controller of the melody E2 audio compressor
- API d_audio_compressor_ctrl;
-
- // AUDIO module
- API d_audio_init;
- API d_audio_status;
-
- // Audio tasks
- // TONES (MCU -> DSP)
- API d_toneskb_init;
- API d_toneskb_status;
- API d_k_x1_t0;
- API d_k_x1_t1;
- API d_k_x1_t2;
- API d_pe_rep;
- API d_pe_off;
- API d_se_off;
- API d_bu_off;
- API d_t0_on;
- API d_t0_off;
- API d_t1_on;
- API d_t1_off;
- API d_t2_on;
- API d_t2_off;
- API d_k_x1_kt0;
- API d_k_x1_kt1;
- API d_dur_kb;
- API d_shiftdl;
- API d_shiftul;
-
- API d_aec_ctrl;
-
- API d_es_level_api;
- API d_mu_api;
-
- // Melody Ringer module
- API d_melo_osc_used;
- API d_melo_osc_active;
- API a_melo_note0[4];
- API a_melo_note1[4];
- API a_melo_note2[4];
- API a_melo_note3[4];
- API a_melo_note4[4];
- API a_melo_note5[4];
- API a_melo_note6[4];
- API a_melo_note7[4];
-
- // selection of the melody format
- API d_melody_selection;
-
- // Holes due to the format melody E1
- API a_melo_holes[3];
-
- // Speech Recognition module
- API d_sr_status; // status of the DSP speech reco task
- API d_sr_param; // paramters for the DSP speech reco task: OOV threshold.
- API d_sr_bit_exact_test; // bit exact test
- API d_sr_nb_words; // number of words used in the speech recognition task
- API d_sr_db_level; // estimate voice level in dB
- API d_sr_db_noise; // estimate noise in dB
- API d_sr_mod_size; // size of the model
- API a_n_best_words[4]; // array of the 4 best words
- API a_n_best_score[8]; // array of the 4 best scores (each score is 32 bits length)
-
- // Audio buffer
- API a_dd_1[22]; // Header + DATA traffic downlink information, sub. chan. 1.
- API a_du_1[22]; // Header + DATA traffic uplink information, sub. chan. 1.
-
- // V42bis module
- API d_v42b_nego0;
- API d_v42b_nego1;
- API d_v42b_control;
- API d_v42b_ratio_ind;
- API d_mcu_control;
- API d_mcu_control_sema;
-
- // Background tasks
- API d_background_enable;
- API d_background_abort;
- API d_background_state;
- API d_max_background;
- API a_background_tasks[16];
- API a_back_task_io[16];
-
- // GEA module defined in l1p_deft.h (the following section is overlaid with GPRS NDB memory)
- API d_gea_mode_ovly;
- API a_gea_kc_ovly[4];
-
-#if (ANLG_FAM == 3)
- // SYREN specific registers
- API d_vbpop;
- API d_vau_delay_init;
- API d_vaud_cfg;
- API d_vauo_onoff;
- API d_vaus_vol;
- API d_vaud_pll;
- API d_hole3_ndb[1];
-#elif ((ANLG_FAM == 1) || (ANLG_FAM == 2))
-
- API d_hole3_ndb[7];
-
-#endif
-
- // word used for the init of USF threshold
- API d_thr_usf_detect;
-
- // Encryption module
- API d_a5mode; // Encryption Mode.
-
- API d_sched_mode_gprs_ovly;
-
- // 7 words are reserved for any possible mapping modification
- API d_hole4_ndb[5];
-
- // Ramp definition for Omega device
- API a_ramp[16];
-
- // CCCH/SACCH downlink information...(!!)
- API a_cd[15]; // Header + CCCH/SACCH downlink information.
-
- // FACCH downlink information........(!!)
- API a_fd[15]; // Header + FACCH downlink information.
-
- // Traffic downlink data frames......(!!)
- API a_dd_0[22]; // Header + DATA traffic downlink information, sub. chan. 0.
-
- // CCCH/SACCH uplink information.....(!!)
- API a_cu[15]; // Header + CCCH/SACCH uplink information.
-
- // FACCH downlink information........(!!)
- API a_fu[15]; // Header + FACCH uplink information
-
- // Traffic downlink data frames......(!!)
- API a_du_0[22]; // Header + DATA traffic uplink information, sub. chan. 0.
-
- // Random access.....................(MCU -> DSP).
- API d_rach; // RACH information.
-
- //...................................(MCU -> DSP).
- API a_kc[4]; // Encryption Key Code.
-
- // Integrated Data Services module
- API d_ra_conf;
- API d_ra_act;
- API d_ra_test;
- API d_ra_statu;
- API d_ra_statd;
- API d_fax;
- API a_data_buf_ul[21];
- API a_data_buf_dl[37];
-
- // GTT API mapping for DSP code 34 (for test only)
- #if (L1_GTT == 1)
- API d_tty_status;
- API d_tty_detect_thres;
- API d_ctm_detect_shift;
- API d_tty_fa_thres;
- API d_tty_mod_norm;
- API d_tty_reset_buffer_ul;
- API d_tty_loop_ctrl;
- API p_tty_loop_buffer;
- #else
- API a_tty_holes[8];
- #endif
-
- API a_sr_holes0[414];
-
- #if (L1_NEW_AEC)
- // new AEC
- API d_cont_filter;
- API d_granularity_att;
- API d_coef_smooth;
- API d_es_level_max;
- API d_fact_vad;
- API d_thrs_abs;
- API d_fact_asd_fil;
- API d_fact_asd_mut;
- API d_far_end_pow_h;
- API d_far_end_pow_l;
- API d_far_end_noise_h;
- API d_far_end_noise_l;
- #else
- API a_new_aec_holes[12];
- #endif // L1_NEW_AEC
-
- // Speech recognition model
- API a_sr_holes1[145];
- API d_cport_init;
- API d_cport_ctrl;
- API a_cport_cfr[2];
- API d_cport_tcl_tadt;
- API d_cport_tdat;
- API d_cport_tvs;
- API d_cport_status;
- API d_cport_reg_value;
-
- API a_cport_holes[1011];
-
- API a_model[1041];
-
- // EOTD buffer
-#if (L1_EOTD==1)
- API d_eotd_first;
- API d_eotd_max;
- API d_eotd_nrj_high;
- API d_eotd_nrj_low;
- API a_eotd_crosscor[18];
-#else
- API a_eotd_holes[22];
-#endif
- // AMR ver 1.0 buffers
- API a_amr_config[4];
- API a_ratscch_ul[6];
- API a_ratscch_dl[6];
- API d_amr_snr_est; // estimation of the SNR of the AMR speech block
- #if (L1_VOICE_MEMO_AMR)
- API d_amms_ul_voc;
- #else
- API a_voice_memo_amr_holes[1];
- #endif
- API d_thr_onset_afs; // thresh detection ONSET AFS
- API d_thr_sid_first_afs; // thresh detection SID_FIRST AFS
- API d_thr_ratscch_afs; // thresh detection RATSCCH AFS
- API d_thr_update_afs; // thresh detection SID_UPDATE AFS
- API d_thr_onset_ahs; // thresh detection ONSET AHS
- API d_thr_sid_ahs; // thresh detection SID frames AHS
- API d_thr_ratscch_marker;// thresh detection RATSCCH MARKER
- API d_thr_sp_dgr; // thresh detection SPEECH DEGRADED/NO_DATA
- API d_thr_soft_bits;
- #if (MELODY_E2)
- API d_melody_e2_osc_stop;
- API d_melody_e2_osc_active;
- API d_melody_e2_semaphore;
- API a_melody_e2_osc[16][3];
- API d_melody_e2_globaltimefactor;
- API a_melody_e2_instrument_ptr[8];
- API d_melody_e2_deltatime;
-
- #if (AMR_THRESHOLDS_WORKAROUND)
- API a_d_macc_thr_afs[8];
- API a_d_macc_thr_ahs[6];
- #else
- API a_melody_e2_holes0[14];
- #endif
-
- API a_melody_e2_holes1[693];
- API a_dsp_trace[SC_AUDIO_MELODY_E2_MAX_SIZE_OF_DSP_TRACE];
- API a_melody_e2_instrument_wave[SC_AUDIO_MELODY_E2_MAX_SIZE_OF_INSTRUMENT];
- #else
- API d_holes[61];
- #if (AMR_THRESHOLDS_WORKAROUND)
- API a_d_macc_thr_afs[8];
- API a_d_macc_thr_ahs[6];
- #endif
- #endif
-
- }
- T_NDB_MCU_DSP;
-#elif (DSP == 33) // NDB GSM
- typedef struct
- {
- // MISC Tasks
- API d_dsp_page;
-
- // DSP status returned (DSP --> MCU).
- API d_error_status;
-
- // RIF control (MCU -> DSP).
- API d_spcx_rif;
-
- API d_tch_mode; // TCH mode register.
- // bit [0..1] -> b_dai_mode.
- // bit [2] -> b_dtx.
-
- API d_debug1; // bit 0 at 1 enable dsp f_tx delay for Omega
-
- API d_dsp_test;
-
- // Words dedicated to Software version (DSP code + Patch)
- API d_version_number1;
- API d_version_number2;
-
- API d_debug_ptr;
- API d_debug_bk;
-
- API d_pll_config;
-
- // GSM/GPRS DSP Debug trace support
- API p_debug_buffer;
- API d_debug_buffer_size;
- API d_debug_trace_type;
-
- #if (W_A_DSP_IDLE3 == 1)
- // DSP report its state: 0 run, 1 Idle1, 2 Idle2, 3 Idle3.
- API d_dsp_state;
- // 10 words are reserved for any possible mapping modification
- API d_hole1_ndb[5];
- #else
- // 11 words are reserved for any possible mapping modification
- API d_hole1_ndb[6];
- #endif
-
- // New words APCDEL1 and APCDEL2 for 2TX: TX/PRACH combinations
- API d_apcdel1_bis;
- API d_apcdel2_bis;
-
-
- // New registers due to IOTA analog base band
- API d_apcdel2;
- API d_vbctrl2;
- API d_bulgcal;
-
- // Analog Based Band
- API d_afcctladd;
-
- API d_vbuctrl;
- API d_vbdctrl;
- API d_apcdel1;
- API d_apcoff;
- API d_bulioff;
- API d_bulqoff;
- API d_dai_onoff;
- API d_auxdac;
-
- #if (ANLG_FAM == 1)
- API d_vbctrl;
- #elif ((ANLG_FAM == 2) || (ANLG_FAM == 3))
- API d_vbctrl1;
- #endif
-
- API d_bbctrl;
-
- // Monitoring tasks control (MCU <- DSP)
- // FB task
- API d_fb_det; // FB detection result. (1 for FOUND).
- API d_fb_mode; // Mode for FB detection algorithm.
- API a_sync_demod[4]; // FB/SB demod. result, (D_TOA,D_PM,D_ANGLE,D_SNR).
-
- // SB Task
- API a_sch26[5]; // Header + SB information, array of 5 words.
-
- API d_audio_gain_ul;
- API d_audio_gain_dl;
-
- // Controller of the melody E2 audio compressor
- API d_audio_compressor_ctrl;
-
- // AUDIO module
- API d_audio_init;
- API d_audio_status;
-
- // Audio tasks
- // TONES (MCU -> DSP)
- API d_toneskb_init;
- API d_toneskb_status;
- API d_k_x1_t0;
- API d_k_x1_t1;
- API d_k_x1_t2;
- API d_pe_rep;
- API d_pe_off;
- API d_se_off;
- API d_bu_off;
- API d_t0_on;
- API d_t0_off;
- API d_t1_on;
- API d_t1_off;
- API d_t2_on;
- API d_t2_off;
- API d_k_x1_kt0;
- API d_k_x1_kt1;
- API d_dur_kb;
- API d_shiftdl;
- API d_shiftul;
-
- API d_aec_ctrl;
-
- API d_es_level_api;
- API d_mu_api;
-
- // Melody Ringer module
- API d_melo_osc_used;
- API d_melo_osc_active;
- API a_melo_note0[4];
- API a_melo_note1[4];
- API a_melo_note2[4];
- API a_melo_note3[4];
- API a_melo_note4[4];
- API a_melo_note5[4];
- API a_melo_note6[4];
- API a_melo_note7[4];
-
- // selection of the melody format
- API d_melody_selection;
-
- // Holes due to the format melody E1
- API a_melo_holes[3];
-
- // Speech Recognition module
- API d_sr_status; // status of the DSP speech reco task
- API d_sr_param; // paramters for the DSP speech reco task: OOV threshold.
- API d_sr_bit_exact_test; // bit exact test
- API d_sr_nb_words; // number of words used in the speech recognition task
- API d_sr_db_level; // estimate voice level in dB
- API d_sr_db_noise; // estimate noise in dB
- API d_sr_mod_size; // size of the model
- API a_n_best_words[4]; // array of the 4 best words
- API a_n_best_score[8]; // array of the 4 best scores (each score is 32 bits length)
-
- // Audio buffer
- API a_dd_1[22]; // Header + DATA traffic downlink information, sub. chan. 1.
- API a_du_1[22]; // Header + DATA traffic uplink information, sub. chan. 1.
-
- // V42bis module
- API d_v42b_nego0;
- API d_v42b_nego1;
- API d_v42b_control;
- API d_v42b_ratio_ind;
- API d_mcu_control;
- API d_mcu_control_sema;
-
- // Background tasks
- API d_background_enable;
- API d_background_abort;
- API d_background_state;
- API d_max_background;
- API a_background_tasks[16];
- API a_back_task_io[16];
-
- // GEA module defined in l1p_deft.h (the following section is overlaid with GPRS NDB memory)
- API d_gea_mode_ovly;
- API a_gea_kc_ovly[4];
-
- API d_hole3_ndb[8];
-
- // Encryption module
- API d_a5mode; // Encryption Mode.
-
- API d_sched_mode_gprs_ovly;
-
- // 7 words are reserved for any possible mapping modification
- API d_hole4_ndb[5];
-
- // Ramp definition for Omega device
- API a_ramp[16];
-
- // CCCH/SACCH downlink information...(!!)
- API a_cd[15]; // Header + CCCH/SACCH downlink information.
-
- // FACCH downlink information........(!!)
- API a_fd[15]; // Header + FACCH downlink information.
-
- // Traffic downlink data frames......(!!)
- API a_dd_0[22]; // Header + DATA traffic downlink information, sub. chan. 0.
-
- // CCCH/SACCH uplink information.....(!!)
- API a_cu[15]; // Header + CCCH/SACCH uplink information.
-
- // FACCH downlink information........(!!)
- API a_fu[15]; // Header + FACCH uplink information
-
- // Traffic downlink data frames......(!!)
- API a_du_0[22]; // Header + DATA traffic uplink information, sub. chan. 0.
-
- // Random access.....................(MCU -> DSP).
- API d_rach; // RACH information.
-
- //...................................(MCU -> DSP).
- API a_kc[4]; // Encryption Key Code.
-
- // Integrated Data Services module
- API d_ra_conf;
- API d_ra_act;
- API d_ra_test;
- API d_ra_statu;
- API d_ra_statd;
- API d_fax;
- API a_data_buf_ul[21];
- API a_data_buf_dl[37];
-
- #if (L1_NEW_AEC)
- // new AEC
- API a_new_aec_holes[422];
- API d_cont_filter;
- API d_granularity_att;
- API d_coef_smooth;
- API d_es_level_max;
- API d_fact_vad;
- API d_thrs_abs;
- API d_fact_asd_fil;
- API d_fact_asd_mut;
- API d_far_end_pow_h;
- API d_far_end_pow_l;
- API d_far_end_noise_h;
- API d_far_end_noise_l;
- #endif
-
- // Speech recognition model
- #if (L1_NEW_AEC)
- API a_sr_holes[1165];
- #else
- API a_sr_holes[1599];
- #endif // L1_NEW_AEC
- API a_model[1041];
-
- // EOTD buffer
- #if (L1_EOTD==1)
- API d_eotd_first;
- API d_eotd_max;
- API d_eotd_nrj_high;
- API d_eotd_nrj_low;
- API a_eotd_crosscor[18];
- #else
- API a_eotd_holes[22];
- #endif
-
- #if (MELODY_E2)
- API a_melody_e2_holes0[27];
- API d_melody_e2_osc_used;
- API d_melody_e2_osc_active;
- API d_melody_e2_semaphore;
- API a_melody_e2_osc[16][3];
- API d_melody_e2_globaltimefactor;
- API a_melody_e2_instrument_ptr[8];
- API a_melody_e2_holes1[708];
- API a_dsp_trace[SC_AUDIO_MELODY_E2_MAX_SIZE_OF_DSP_TRACE];
- API a_melody_e2_instrument_wave[SC_AUDIO_MELODY_E2_MAX_SIZE_OF_INSTRUMENT];
- #endif
- }
- T_NDB_MCU_DSP;
-
-#elif ((DSP == 32) || (DSP == 31))
- typedef struct
- {
- // Monitoring tasks control..........(MCU <- DSP)
- API d_fb_det; // FB detection result. (1 for FOUND).
- API d_fb_mode; // Mode for FB detection algorithm.
- API a_sync_demod[4]; // FB/SB demod. result, (D_TOA,D_PM,D_ANGLE,D_SNR).
-
- // CCCH/SACCH downlink information...(!!)
- API a_cd[15]; // Header + CCCH/SACCH downlink information.
-
- // FACCH downlink information........(!!)
- API a_fd[15]; // Header + FACCH downlink information.
-
- // Traffic downlink data frames......(!!)
- API a_dd_0[22]; // Header + DATA traffic downlink information, sub. chan. 0.
- API a_dd_1[22]; // Header + DATA traffic downlink information, sub. chan. 1.
-
- // CCCH/SACCH uplink information.....(!!)
- API a_cu[15]; // Header + CCCH/SACCH uplink information.
-
- #if (SPEECH_RECO)
- // FACCH downlink information........(!!)
- API a_fu[3]; // Header + FACCH uplink information
- // The size of this buffer is 15 word but some speech reco words
- // are overlayer with this buffer. This is the reason why the size is 3 instead of 15.
- API d_sr_status; // status of the DSP speech reco task
- API d_sr_param; // paramters for the DSP speech reco task: OOV threshold.
- API sr_hole1; // hole
- API d_sr_bit_exact_test; // bit exact test
- API d_sr_nb_words; // number of words used in the speech recognition task
- API d_sr_db_level; // estimate voice level in dB
- API d_sr_db_noise; // estimate noise in dB
- API d_sr_mod_size; // size of the model
- API sr_holes_1[4]; // hole
- #else
- // FACCH downlink information........(!!)
- API a_fu[15]; // Header + FACCH uplink information
- #endif
-
- // Traffic uplink data frames........(!!)
- API a_du_0[22]; // Header + DATA traffic uplink information, sub. chan. 0.
- API a_du_1[22]; // Header + DATA traffic uplink information, sub. chan. 1.
-
- // Random access.....................(MCU -> DSP).
- API d_rach; // RACH information.
-
- //...................................(MCU -> DSP).
- API d_a5mode; // Encryption Mode.
- API a_kc[4]; // Encryption Key Code.
- API d_tch_mode; // TCH mode register.
- // bit [0..1] -> b_dai_mode.
- // bit [2] -> b_dtx.
-
- // OMEGA...........................(MCU -> DSP).
- #if ((ANLG_FAM == 1) || (ANLG_FAM == 2))
- API a_ramp[16];
- #if (MELODY_E1)
- API d_melo_osc_used;
- API d_melo_osc_active;
- API a_melo_note0[4];
- API a_melo_note1[4];
- API a_melo_note2[4];
- API a_melo_note3[4];
- API a_melo_note4[4];
- API a_melo_note5[4];
- API a_melo_note6[4];
- API a_melo_note7[4];
- #if (DSP==31)
- // selection of the melody format
- API d_melody_selection;
- API holes[9];
- #else // DSP==32
- API d_dco_type; // Tide
- API p_start_IQ;
- API d_level_off;
- API d_dco_dbg;
- API d_tide_resa;
- API d_asynch_margin; // Perseus Asynch Audio Workaround
- API hole[4];
- #endif // DSP 32
-
- #else // NO MELODY E1
- #if (DSP==31)
- // selection of the melody format
- API d_melody_selection;
- API holes[43]; // 43 unused holes.
- #else // DSP==32
- API holes[34]; // 34 unused holes.
- API d_dco_type; // Tide
- API p_start_IQ;
- API d_level_off;
- API d_dco_dbg;
- API d_tide_resa;
- API d_asynch_margin; // Perseus Asynch Audio Workaround
- API hole[4];
- #endif //DSP == 32
- #endif // NO MELODY E1
-
- API d_debug3;
- API d_debug2;
- API d_debug1; // bit 0 at 1 enable dsp f_tx delay for Omega
- API d_afcctladd;
- API d_vbuctrl;
- API d_vbdctrl;
- API d_apcdel1;
- API d_aec_ctrl;
- API d_apcoff;
- API d_bulioff;
- API d_bulqoff;
- API d_dai_onoff;
- API d_auxdac;
-
- #if (ANLG_FAM == 1)
- API d_vbctrl;
- #elif (ANLG_FAM == 2)
- API d_vbctrl1;
- #endif
-
- API d_bbctrl;
- #else
- #error DSPCODE not supported with given ANALOG
- #endif //(ANALOG)1, 2
- //...................................(MCU -> DSP).
- API a_sch26[5]; // Header + SB information, array of 5 words.
-
- // TONES.............................(MCU -> DSP)
- API d_toneskb_init;
- API d_toneskb_status;
- API d_k_x1_t0;
- API d_k_x1_t1;
- API d_k_x1_t2;
- API d_pe_rep;
- API d_pe_off;
- API d_se_off;
- API d_bu_off;
- API d_t0_on;
- API d_t0_off;
- API d_t1_on;
- API d_t1_off;
- API d_t2_on;
- API d_t2_off;
- API d_k_x1_kt0;
- API d_k_x1_kt1;
- API d_dur_kb;
-
- // PLL...............................(MCU -> DSP).
- API d_pll_clkmod1;
- API d_pll_clkmod2;
-
- // DSP status returned..........(DSP --> MCU).
- API d_error_status;
-
- // RIF control.......................(MCU -> DSP).
- API d_spcx_rif;
-
- API d_shiftdl;
- API d_shiftul;
-
- API p_saec_prog;
- API p_aec_prog;
- API p_spenh_prog;
-
- API a_ovly[75];
- API d_ra_conf;
- API d_ra_act;
- API d_ra_test;
- API d_ra_statu;
- API d_ra_statd;
- API d_fax;
- #if (SPEECH_RECO)
- API a_data_buf_ul[3];
- API a_n_best_words[4]; // array of the 4 best words
- API a_n_best_score[8]; // array of the 4 best scores (each score is 32 bits length)
- API sr_holes_2[6];
- API a_data_buf_dl[37];
-
- API a_hole[24];
-
- API d_sched_mode_gprs_ovly;
-
- API fir_holes1[384];
- API a_fir31_uplink[31];
- API a_fir31_downlink[31];
- API d_audio_init;
- API d_audio_status;
-
- API a_model[1041]; // array of the speech reco model
- #else
- API a_data_buf_ul[21];
- API a_data_buf_dl[37];
-
- API a_hole[24];
-
- API d_sched_mode_gprs_ovly;
-
- API fir_holes1[384];
- API a_fir31_uplink[31];
- API a_fir31_downlink[31];
- API d_audio_init;
- API d_audio_status;
-
-#if (L1_EOTD ==1)
- API a_eotd_hole[369];
-
- API d_eotd_first;
- API d_eotd_max;
- API d_eotd_nrj_high;
- API d_eotd_nrj_low;
- API a_eotd_crosscor[18];
-#endif
- #endif
- }
- T_NDB_MCU_DSP;
-
-
-#else // OTHER DSP CODE like 17
-
-typedef struct
-{
- // Monitoring tasks control..........(MCU <- DSP)
- API d_fb_det; // FB detection result. (1 for FOUND).
- API d_fb_mode; // Mode for FB detection algorithm.
- API a_sync_demod[4]; // FB/SB demod. result, (D_TOA,D_PM,D_ANGLE,D_SNR).
-
- // CCCH/SACCH downlink information...(!!)
- API a_cd[15]; // Header + CCCH/SACCH downlink information.
-
- // FACCH downlink information........(!!)
- API a_fd[15]; // Header + FACCH downlink information.
-
- // Traffic downlink data frames......(!!)
- #if (DATA14_4 == 0)
- API a_dd_0[20]; // Header + DATA traffic downlink information, sub. chan. 0.
- API a_dd_1[20]; // Header + DATA traffic downlink information, sub. chan. 1.
- #endif
- #if (DATA14_4 == 1)
- API a_dd_0[22]; // Header + DATA traffic downlink information, sub. chan. 0.
- API a_dd_1[22]; // Header + DATA traffic downlink information, sub. chan. 1.
- #endif
-
- // CCCH/SACCH uplink information.....(!!)
- API a_cu[15]; // Header + CCCH/SACCH uplink information.
-
- #if (SPEECH_RECO)
- // FACCH downlink information........(!!)
- API a_fu[3]; // Header + FACCH uplink information
- // The size of this buffer is 15 word but some speech reco words
- // are overlayer with this buffer. This is the reason why the size is 3 instead of 15.
- API d_sr_status; // status of the DSP speech reco task
- API d_sr_param; // paramters for the DSP speech reco task: OOV threshold.
- API sr_hole1; // hole
- API d_sr_bit_exact_test; // bit exact test
- API d_sr_nb_words; // number of words used in the speech recognition task
- API d_sr_db_level; // estimate voice level in dB
- API d_sr_db_noise; // estimate noise in dB
- API d_sr_mod_size; // size of the model
- API sr_holes_1[4]; // hole
- #else
- // FACCH downlink information........(!!)
- API a_fu[15]; // Header + FACCH uplink information
- #endif
-
- // Traffic uplink data frames........(!!)
- #if (DATA14_4 == 0)
- API a_du_0[20]; // Header + DATA traffic uplink information, sub. chan. 0.
- API a_du_1[20]; // Header + DATA traffic uplink information, sub. chan. 1.
- #endif
- #if (DATA14_4 == 1)
- API a_du_0[22]; // Header + DATA traffic uplink information, sub. chan. 0.
- API a_du_1[22]; // Header + DATA traffic uplink information, sub. chan. 1.
- #endif
-
- // Random access.....................(MCU -> DSP).
- API d_rach; // RACH information.
-
- //...................................(MCU -> DSP).
- API d_a5mode; // Encryption Mode.
- API a_kc[4]; // Encryption Key Code.
- API d_tch_mode; // TCH mode register.
- // bit [0..1] -> b_dai_mode.
- // bit [2] -> b_dtx.
-
- // OMEGA...........................(MCU -> DSP).
-
-#if ((ANLG_FAM == 1) || (ANLG_FAM == 2))
- API a_ramp[16];
- #if (MELODY_E1)
- API d_melo_osc_used;
- API d_melo_osc_active;
- API a_melo_note0[4];
- API a_melo_note1[4];
- API a_melo_note2[4];
- API a_melo_note3[4];
- API a_melo_note4[4];
- API a_melo_note5[4];
- API a_melo_note6[4];
- API a_melo_note7[4];
- #if (DSP == 17)
- // selection of the melody format
- API d_dco_type; // Tide
- API p_start_IQ;
- API d_level_off;
- API d_dco_dbg;
- API d_tide_resa;
- API d_asynch_margin; // Perseus Asynch Audio Workaround
- API hole[4];
- #else
- API d_melody_selection;
- API holes[9];
- #endif
- #else // NO MELODY E1
- // selection of the melody format
- #if (DSP == 17)
- API holes[34]; // 34 unused holes.
- API d_dco_type; // Tide
- API p_start_IQ;
- API d_level_off;
- API d_dco_dbg;
- API d_tide_resa;
- API d_asynch_margin; // Perseus Asynch Audio Workaround
- API hole[4]
- #else
- // selection of the melody format
- API d_melody_selection;
- API holes[43]; // 43 unused holes.
- #endif
- #endif
- API d_debug3;
- API d_debug2;
- API d_debug1; // bit 0 at 1 enable dsp f_tx delay for Omega
- API d_afcctladd;
- API d_vbuctrl;
- API d_vbdctrl;
- API d_apcdel1;
- API d_aec_ctrl;
- API d_apcoff;
- API d_bulioff;
- API d_bulqoff;
- API d_dai_onoff;
- API d_auxdac;
- #if (ANLG_FAM == 1)
- API d_vbctrl;
- #elif (ANLG_FAM == 2)
- API d_vbctrl1;
- #endif
- API d_bbctrl;
-
- #else
- #error DSPCODE not supported with given ANALOG
- #endif //(ANALOG)1, 2
- //...................................(MCU -> DSP).
- API a_sch26[5]; // Header + SB information, array of 5 words.
-
- // TONES.............................(MCU -> DSP)
- API d_toneskb_init;
- API d_toneskb_status;
- API d_k_x1_t0;
- API d_k_x1_t1;
- API d_k_x1_t2;
- API d_pe_rep;
- API d_pe_off;
- API d_se_off;
- API d_bu_off;
- API d_t0_on;
- API d_t0_off;
- API d_t1_on;
- API d_t1_off;
- API d_t2_on;
- API d_t2_off;
- API d_k_x1_kt0;
- API d_k_x1_kt1;
- API d_dur_kb;
-
- // PLL...............................(MCU -> DSP).
- API d_pll_clkmod1;
- API d_pll_clkmod2;
-
- // DSP status returned..........(DSP --> MCU).
- API d_error_status;
-
- // RIF control.......................(MCU -> DSP).
- API d_spcx_rif;
-
- API d_shiftdl;
- API d_shiftul;
-
- #if (AEC == 1)
- // AEC control.......................(MCU -> DSP).
- #if (VOC == FR_EFR)
- API p_aec_init;
- API p_aec_prog;
- API p_spenh_init;
- API p_spenh_prog;
- #endif
-
- #if (VOC == FR_HR_EFR)
- API p_saec_prog;
- API p_aec_prog;
- API p_spenh_prog;
- #endif
- #endif
-
- API a_ovly[75];
- API d_ra_conf;
- API d_ra_act;
- API d_ra_test;
- API d_ra_statu;
- API d_ra_statd;
- API d_fax;
- #if (SPEECH_RECO)
- API a_data_buf_ul[3];
- API a_n_best_words[4]; // array of the 4 best words
- API a_n_best_score[8]; // array of the 4 best scores (each score is 32 bits length)
- API sr_holes_2[6];
- API a_data_buf_dl[37];
-
- API fir_holes1[409];
- API a_fir31_uplink[31];
- API a_fir31_downlink[31];
- API d_audio_init;
- API d_audio_status;
- API a_model[1041]; // array of the speech reco model
- #else
- API a_data_buf_ul[21];
- API a_data_buf_dl[37];
-
- API fir_holes1[409];
- API a_fir31_uplink[31];
- API a_fir31_downlink[31];
- API d_audio_init;
- API d_audio_status;
- #endif
-}
-T_NDB_MCU_DSP;
-#endif
-
-#if (DSP == 34) || (DSP == 35) || (DSP == 36)
-typedef struct
-{
- API_SIGNED d_transfer_rate;
-
- // Common GSM/GPRS
- // These words specified the latencies to applies on some peripherics
- API_SIGNED d_lat_mcu_bridge;
- API_SIGNED d_lat_mcu_hom2sam;
- API_SIGNED d_lat_mcu_bef_fast_access;
- API_SIGNED d_lat_dsp_after_sam;
-
- // DSP Start address
- API_SIGNED d_gprs_install_address;
-
- API_SIGNED d_misc_config;
-
- API_SIGNED d_cn_sw_workaround;
-
- API_SIGNED d_hole2_param[4];
-
- //...................................Frequency Burst.
- API_SIGNED d_fb_margin_beg;
- API_SIGNED d_fb_margin_end;
- API_SIGNED d_nsubb_idle;
- API_SIGNED d_nsubb_dedic;
- API_SIGNED d_fb_thr_det_iacq;
- API_SIGNED d_fb_thr_det_track;
- //...................................Demodulation.
- API_SIGNED d_dc_off_thres;
- API_SIGNED d_dummy_thres;
- API_SIGNED d_dem_pond_gewl;
- API_SIGNED d_dem_pond_red;
-
- //...................................TCH Full Speech.
- API_SIGNED d_maccthresh1;
- API_SIGNED d_mldt;
- API_SIGNED d_maccthresh;
- API_SIGNED d_gu;
- API_SIGNED d_go;
- API_SIGNED d_attmax;
- API_SIGNED d_sm;
- API_SIGNED d_b;
-
- // V42Bis module
- API_SIGNED d_v42b_switch_hyst;
- API_SIGNED d_v42b_switch_min;
- API_SIGNED d_v42b_switch_max;
- API_SIGNED d_v42b_reset_delay;
-
- //...................................TCH Half Speech.
- API_SIGNED d_ldT_hr;
- API_SIGNED d_maccthresh_hr;
- API_SIGNED d_maccthresh1_hr;
- API_SIGNED d_gu_hr;
- API_SIGNED d_go_hr;
- API_SIGNED d_b_hr;
- API_SIGNED d_sm_hr;
- API_SIGNED d_attmax_hr;
-
- //...................................TCH Enhanced FR Speech.
- API_SIGNED c_mldt_efr;
- API_SIGNED c_maccthresh_efr;
- API_SIGNED c_maccthresh1_efr;
- API_SIGNED c_gu_efr;
- API_SIGNED c_go_efr;
- API_SIGNED c_b_efr;
- API_SIGNED c_sm_efr;
- API_SIGNED c_attmax_efr;
-
- //...................................CHED
- API_SIGNED d_sd_min_thr_tchfs;
- API_SIGNED d_ma_min_thr_tchfs;
- API_SIGNED d_md_max_thr_tchfs;
- API_SIGNED d_md1_max_thr_tchfs;
-
- API_SIGNED d_sd_min_thr_tchhs;
- API_SIGNED d_ma_min_thr_tchhs;
- API_SIGNED d_sd_av_thr_tchhs;
- API_SIGNED d_md_max_thr_tchhs;
- API_SIGNED d_md1_max_thr_tchhs;
-
- API_SIGNED d_sd_min_thr_tchefs;
- API_SIGNED d_ma_min_thr_tchefs;
- API_SIGNED d_md_max_thr_tchefs;
- API_SIGNED d_md1_max_thr_tchefs;
-
- API_SIGNED d_wed_fil_ini;
- API_SIGNED d_wed_fil_tc;
- API_SIGNED d_x_min;
- API_SIGNED d_x_max;
- API_SIGNED d_slope;
- API_SIGNED d_y_min;
- API_SIGNED d_y_max;
- API_SIGNED d_wed_diff_threshold;
- API_SIGNED d_mabfi_min_thr_tchhs;
-
- // FACCH module
- API_SIGNED d_facch_thr;
-
- // IDS module
- API_SIGNED d_max_ovsp_ul;
- API_SIGNED d_sync_thres;
- API_SIGNED d_idle_thres;
- API_SIGNED d_m1_thres;
- API_SIGNED d_max_ovsp_dl;
- API_SIGNED d_gsm_bgd_mgt;
-
- // FIR coefficients
- API a_fir_holes[4];
- API a_fir31_uplink[31];
- API a_fir31_downlink[31];
-}
-T_PARAM_MCU_DSP;
-#elif (DSP == 33)
-typedef struct
-{
- API_SIGNED d_transfer_rate;
-
- // Common GSM/GPRS
- // These words specified the latencies to applies on some peripherics
- API_SIGNED d_lat_mcu_bridge;
- API_SIGNED d_lat_mcu_hom2sam;
- API_SIGNED d_lat_mcu_bef_fast_access;
- API_SIGNED d_lat_dsp_after_sam;
-
- // DSP Start address
- API_SIGNED d_gprs_install_address;
-
- API_SIGNED d_misc_config;
-
- API_SIGNED d_cn_sw_workaround;
-
- #if DCO_ALGO
- API_SIGNED d_cn_dco_param;
-
- API_SIGNED d_hole2_param[3];
- #else
- API_SIGNED d_hole2_param[4];
- #endif
-
- //...................................Frequency Burst.
- API_SIGNED d_fb_margin_beg;
- API_SIGNED d_fb_margin_end;
- API_SIGNED d_nsubb_idle;
- API_SIGNED d_nsubb_dedic;
- API_SIGNED d_fb_thr_det_iacq;
- API_SIGNED d_fb_thr_det_track;
- //...................................Demodulation.
- API_SIGNED d_dc_off_thres;
- API_SIGNED d_dummy_thres;
- API_SIGNED d_dem_pond_gewl;
- API_SIGNED d_dem_pond_red;
-
- //...................................TCH Full Speech.
- API_SIGNED d_maccthresh1;
- API_SIGNED d_mldt;
- API_SIGNED d_maccthresh;
- API_SIGNED d_gu;
- API_SIGNED d_go;
- API_SIGNED d_attmax;
- API_SIGNED d_sm;
- API_SIGNED d_b;
-
- // V42Bis module
- API_SIGNED d_v42b_switch_hyst;
- API_SIGNED d_v42b_switch_min;
- API_SIGNED d_v42b_switch_max;
- API_SIGNED d_v42b_reset_delay;
-
- //...................................TCH Half Speech.
- API_SIGNED d_ldT_hr;
- API_SIGNED d_maccthresh_hr;
- API_SIGNED d_maccthresh1_hr;
- API_SIGNED d_gu_hr;
- API_SIGNED d_go_hr;
- API_SIGNED d_b_hr;
- API_SIGNED d_sm_hr;
- API_SIGNED d_attmax_hr;
-
- //...................................TCH Enhanced FR Speech.
- API_SIGNED c_mldt_efr;
- API_SIGNED c_maccthresh_efr;
- API_SIGNED c_maccthresh1_efr;
- API_SIGNED c_gu_efr;
- API_SIGNED c_go_efr;
- API_SIGNED c_b_efr;
- API_SIGNED c_sm_efr;
- API_SIGNED c_attmax_efr;
-
- //...................................CHED
- API_SIGNED d_sd_min_thr_tchfs;
- API_SIGNED d_ma_min_thr_tchfs;
- API_SIGNED d_md_max_thr_tchfs;
- API_SIGNED d_md1_max_thr_tchfs;
-
- API_SIGNED d_sd_min_thr_tchhs;
- API_SIGNED d_ma_min_thr_tchhs;
- API_SIGNED d_sd_av_thr_tchhs;
- API_SIGNED d_md_max_thr_tchhs;
- API_SIGNED d_md1_max_thr_tchhs;
-
- API_SIGNED d_sd_min_thr_tchefs;
- API_SIGNED d_ma_min_thr_tchefs;
- API_SIGNED d_md_max_thr_tchefs;
- API_SIGNED d_md1_max_thr_tchefs;
-
- API_SIGNED d_wed_fil_ini;
- API_SIGNED d_wed_fil_tc;
- API_SIGNED d_x_min;
- API_SIGNED d_x_max;
- API_SIGNED d_slope;
- API_SIGNED d_y_min;
- API_SIGNED d_y_max;
- API_SIGNED d_wed_diff_threshold;
- API_SIGNED d_mabfi_min_thr_tchhs;
-
- // FACCH module
- API_SIGNED d_facch_thr;
-
- // IDS module
- API_SIGNED d_max_ovsp_ul;
- API_SIGNED d_sync_thres;
- API_SIGNED d_idle_thres;
- API_SIGNED d_m1_thres;
- API_SIGNED d_max_ovsp_dl;
- API_SIGNED d_gsm_bgd_mgt;
-
- // FIR coefficients
- API a_fir_holes[4];
- API a_fir31_uplink[31];
- API a_fir31_downlink[31];
-}
-T_PARAM_MCU_DSP;
-
-#else
-
-typedef struct
-{
- //...................................Frequency Burst.
- API_SIGNED d_nsubb_idle;
- API_SIGNED d_nsubb_dedic;
- API_SIGNED d_fb_thr_det_iacq;
- API_SIGNED d_fb_thr_det_track;
- //...................................Demodulation.
- API_SIGNED d_dc_off_thres;
- API_SIGNED d_dummy_thres;
- API_SIGNED d_dem_pond_gewl;
- API_SIGNED d_dem_pond_red;
- API_SIGNED hole[1];
- API_SIGNED d_transfer_rate;
- //...................................TCH Full Speech.
- API_SIGNED d_maccthresh1;
- API_SIGNED d_mldt;
- API_SIGNED d_maccthresh;
- API_SIGNED d_gu;
- API_SIGNED d_go;
- API_SIGNED d_attmax;
- API_SIGNED d_sm;
- API_SIGNED d_b;
-
- #if (VOC == FR_HR) || (VOC == FR_HR_EFR)
- //...................................TCH Half Speech.
- API_SIGNED d_ldT_hr;
- API_SIGNED d_maccthresh_hr;
- API_SIGNED d_maccthresh1_hr;
- API_SIGNED d_gu_hr;
- API_SIGNED d_go_hr;
- API_SIGNED d_b_hr;
- API_SIGNED d_sm_hr;
- API_SIGNED d_attmax_hr;
- #endif
-
- #if (VOC == FR_EFR) || (VOC == FR_HR_EFR)
- //...................................TCH Enhanced FR Speech.
- API_SIGNED c_mldt_efr;
- API_SIGNED c_maccthresh_efr;
- API_SIGNED c_maccthresh1_efr;
- API_SIGNED c_gu_efr;
- API_SIGNED c_go_efr;
- API_SIGNED c_b_efr;
- API_SIGNED c_sm_efr;
- API_SIGNED c_attmax_efr;
- #endif
-
- //...................................TCH Full Speech.
- API_SIGNED d_sd_min_thr_tchfs;
- API_SIGNED d_ma_min_thr_tchfs;
- API_SIGNED d_md_max_thr_tchfs;
- API_SIGNED d_md1_max_thr_tchfs;
-
- #if (VOC == FR) || (VOC == FR_HR) || (VOC == FR_HR_EFR)
- //...................................TCH Half Speech.
- API_SIGNED d_sd_min_thr_tchhs;
- API_SIGNED d_ma_min_thr_tchhs;
- API_SIGNED d_sd_av_thr_tchhs;
- API_SIGNED d_md_max_thr_tchhs;
- API_SIGNED d_md1_max_thr_tchhs;
- #endif
-
- #if (VOC == FR_EFR) || (VOC == FR_HR_EFR)
- //...................................TCH Enhanced FR Speech.
- API_SIGNED d_sd_min_thr_tchefs; //(24L *C_POND_RED)
- API_SIGNED d_ma_min_thr_tchefs; //(1200L *C_POND_RED)
- API_SIGNED d_md_max_thr_tchefs; //(2000L *C_POND_RED)
- API_SIGNED d_md1_max_thr_tchefs; //(160L *C_POND_RED)
- API_SIGNED d_hole1;
- #endif
-
- API_SIGNED d_wed_fil_ini;
- API_SIGNED d_wed_fil_tc;
- API_SIGNED d_x_min;
- API_SIGNED d_x_max;
- API_SIGNED d_slope;
- API_SIGNED d_y_min;
- API_SIGNED d_y_max;
- API_SIGNED d_wed_diff_threshold;
- API_SIGNED d_mabfi_min_thr_tchhs;
- API_SIGNED d_facch_thr;
- API_SIGNED d_dsp_test;
-
-
- #if (DATA14_4 == 0 ) || (VOC == FR_HR_EFR)
- API_SIGNED d_patch_addr1;
- API_SIGNED d_patch_data1;
- API_SIGNED d_patch_addr2;
- API_SIGNED d_patch_data2;
- API_SIGNED d_patch_addr3;
- API_SIGNED d_patch_data3;
- API_SIGNED d_patch_addr4;
- API_SIGNED d_patch_data4;
- #endif
-
- //...................................
- API_SIGNED d_version_number; // DSP patch version
- API_SIGNED d_ti_version; // customer number. No more used since 1.5
-
- API_SIGNED d_dsp_page;
-
- #if IDS
- API_SIGNED d_max_ovsp_ul;
- API_SIGNED d_sync_thres;
- API_SIGNED d_idle_thres;
- API_SIGNED d_m1_thres;
- API_SIGNED d_max_ovsp_dl;
- #endif
-
-
-}
-T_PARAM_MCU_DSP;
-#endif
-
-#if (DSP_DEBUG_TRACE_ENABLE == 1)
-typedef struct
-{
- API d_debug_ptr_begin;
- API d_debug_ptr_end;
-}
-T_DB2_DSP_TO_MCU;
-#endif
-
-/* DSP error as per ndb->d_error_status */
-enum dsp_error {
- DSP_ERR_RHEA = 0x0001,
- DSP_ERR_IQ_SAMPLES = 0x0004,
- DSP_ERR_DMA_PROG = 0x0008,
- DSP_ERR_DMA_TASK = 0x0010,
- DSP_ERR_DMA_PEND = 0x0020,
- DSP_ERR_VM = 0x0080,
- DSP_ERR_DMA_UL_TASK = 0x0100,
- DSP_ERR_DMA_UL_PROG = 0x0200,
- DSP_ERR_DMA_UL_PEND = 0x0400,
- DSP_ERR_STACK_OV = 0x0800,
-};
-
-/* How an ABB register + value is expressed in the API RAM */
-#define ABB_VAL(reg, val) ( (((reg) & 0x1F) << 1) | (((val) & 0x3FF) << 6) )
-
-/* How an ABB register + value | TRUE is expressed in the API RAM */
-#define ABB_VAL_T(reg, val) (ABB_VAL(reg, val) | 1)
-
-#endif /* _CAL_DSP_API_H */
diff --git a/Src/osmoconbb/src/target/firmware/include/calypso/du.h b/Src/osmoconbb/src/target/firmware/include/calypso/du.h
deleted file mode 100644
index f2eae09..0000000
--- a/Src/osmoconbb/src/target/firmware/include/calypso/du.h
+++ /dev/null
@@ -1,32 +0,0 @@
-/* Calypso DU (Debug Unit) Driver */
-
-/* (C) 2010 by Ingo Albrecht <prom@berlin.ccc.de>
- *
- * All Rights Reserved
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- */
-
-#ifndef _CALYPSO_DU_H
-#define _CALYPSO_DU_H
-
-#include <calypso/clock.h>
-
-void calypso_du_init();
-void calypso_du_stop();
-void calypsu_du_dump();
-
-#endif /* _CALYPSO_DU_H */
diff --git a/Src/osmoconbb/src/target/firmware/include/calypso/irq.h b/Src/osmoconbb/src/target/firmware/include/calypso/irq.h
deleted file mode 100644
index 5ea5979..0000000
--- a/Src/osmoconbb/src/target/firmware/include/calypso/irq.h
+++ /dev/null
@@ -1,49 +0,0 @@
-#ifndef _CALYPSO_IRQ_H
-#define _CALYPSO_IRQ_H
-
-enum irq_nr {
- IRQ_WATCHDOG = 0,
- IRQ_TIMER1 = 1,
- IRQ_TIMER2 = 2,
- IRQ_TSP_RX = 3,
- IRQ_TPU_FRAME = 4,
- IRQ_TPU_PAGE = 5,
- IRQ_SIMCARD = 6,
- IRQ_UART_MODEM = 7,
- IRQ_KEYPAD_GPIO = 8,
- IRQ_RTC_TIMER = 9,
- IRQ_RTC_ALARM_I2C = 10,
- IRQ_ULPD_GAUGING = 11,
- IRQ_EXTERNAL = 12,
- IRQ_SPI = 13,
- IRQ_DMA = 14,
- IRQ_API = 15,
- IRQ_SIM_DETECT = 16,
- IRQ_EXTERNAL_FIQ = 17,
- IRQ_UART_IRDA = 18,
- IRQ_ULPD_GSM_TIMER = 19,
- IRQ_GEA = 20,
- _NR_IRQ
-};
-
-typedef void irq_handler(enum irq_nr nr);
-
-/* initialize IRQ driver and enable interrupts */
-void irq_init(void);
-
-/* enable a certain interrupt */
-void irq_enable(enum irq_nr nr);
-
-/* disable a certain interrupt */
-void irq_disable(enum irq_nr nr);
-
-/* configure a certain interrupt */
-void irq_config(enum irq_nr nr, int fiq, int edge, int8_t prio);
-
-/* register an interrupt handler */
-void irq_register_handler(enum irq_nr nr, irq_handler *handler);
-
-/* Install the exception handlers to where the ROM loader jumps */
-void calypso_exceptions_install(void);
-
-#endif /* _CALYPSO_IRQ_H */
diff --git a/Src/osmoconbb/src/target/firmware/include/calypso/l1_environment.h b/Src/osmoconbb/src/target/firmware/include/calypso/l1_environment.h
deleted file mode 100644
index d4d442c..0000000
--- a/Src/osmoconbb/src/target/firmware/include/calypso/l1_environment.h
+++ /dev/null
@@ -1,385 +0,0 @@
-#include <stdint.h>
-
-typedef unsigned short API;
-typedef signed short API_SIGNED;
-
-#define FAR
-
-#define CHIPSET 12
-#define DSP 36
-#define ANLG_FAM 2 /* Iota */
-
-/* MFTAB */
-#define L1_MAX_FCT 5 /* Max number of fctions in a frame */
-#define MFTAB_SIZE 20
-
-#define NBMAX_CARRIER 174+374 /* Number of carriers (GSM-Ext + DCS */
-
-#define DPAGC_FIFO_LEN 4
-
-#define SIZE_HIST 10
-
-#if !L1_GPRS
-# define NBR_DL_L1S_TASKS 32
-#else
-# define NBR_DL_L1S_TASKS 45
-#endif
-
-#define NBR_L1A_PROCESSES 46
-
-#define W_A_DSP_IDLE3 1
-
-
-
-// Identifier for all DSP tasks.
-// ...RX & TX tasks identifiers.
-#define NO_DSP_TASK 0 // No task.
-#define NP_DSP_TASK 21 // Normal Paging reading task.
-#define EP_DSP_TASK 22 // Extended Paging reading task.
-#define NBS_DSP_TASK 19 // Normal BCCH serving reading task.
-#define EBS_DSP_TASK 20 // Extended BCCH serving reading task.
-#define NBN_DSP_TASK 17 // Normal BCCH neighbour reading task.
-#define EBN_DSP_TASK 18 // Extended BCCH neighbour reading task.
-#define ALLC_DSP_TASK 24 // CCCH reading task while performing FULL BCCH/CCCH reading task.
-#define CB_DSP_TASK 25 // CBCH reading task.
-#define DDL_DSP_TASK 26 // SDCCH/D (data) reading task.
-#define ADL_DSP_TASK 27 // SDCCH/A (SACCH) reading task.
-#define DUL_DSP_TASK 12 // SDCCH/D (data) transmit task.
-#define AUL_DSP_TASK 11 // SDCCH/A (SACCH) transmit task.
-#define RACH_DSP_TASK 10 // RACH transmit task.
-#define TCHT_DSP_TASK 13 // TCH Traffic data DSP task id (RX or TX)
-#define TCHA_DSP_TASK 14 // TCH SACCH data DSP task id (RX or TX)
-#define TCHD_DSP_TASK 28 // TCH Traffic data DSP task id (RX or TX)
-
-#define TCH_DTX_UL 15 // Replace UL task in DSP->MCU com. to say "burst not transmitted".
-
-#if (L1_GPRS)
- // Identifier for DSP tasks Packet dedicated.
- // ...RX & TX tasks identifiers.
- //------------------------------------------------------------------------
- // WARNING ... Need to aligned following macro with MCU/DSP GPRS Interface
- //------------------------------------------------------------------------
- #define PNP_DSP_TASK 30
- #define PEP_DSP_TASK 31
- #define PALLC_DSP_TASK 32
- #define PBS_DSP_TASK 33
-
- #define PTCCH_DSP_TASK 33
-
-#endif
-
-// Identifier for measurement, FB / SB search tasks.
-// Values 1,2,3 reserved for "number of measurements".
-#define FB_DSP_TASK 5 // Freq. Burst reading task in Idle mode.
-#define SB_DSP_TASK 6 // Sync. Burst reading task in Idle mode.
-#define TCH_FB_DSP_TASK 8 // Freq. Burst reading task in Dedicated mode.
-#define TCH_SB_DSP_TASK 9 // Sync. Burst reading task in Dedicated mode.
-#define IDLE1 1
-
-// Debug tasks
-#define CHECKSUM_DSP_TASK 33
-#define TST_NDB 35 // Checksum DSP->MCU
-#define TST_DB 36 // DB communication check
-#define INIT_VEGA 37
-#define DSP_LOOP_C 38
-
-// Identifier for measurement, FB / SB search tasks.
-// Values 1,2,3 reserved for "number of measurements".
-#define TCH_LOOP_A 31
-#define TCH_LOOP_B 32
-
-// bits in d_gsm_bgd_mgt - background task management
-#define B_DSPBGD_RECO 1 // start of reco in dsp background
-#define B_DSPBGD_UPD 2 // start of alignement update in dsp background
-#define B_DSPBGD_STOP_RECO 256 // stop of reco in dsp background
-#define B_DSPBGD_STOP_UPD 512 // stop of alignement update in dsp background
-
-// bit in d_pll_config
-#define B_32KHZ_CALIB (1 << 14) // force DSP in Idle1 during 32 khz calibration
-// ****************************************************************
-// NDB AREA (PARAM) MCU<->DSP COMMUNICATION DEFINITIONS
-// ****************************************************************
-// bits in d_tch_mode
-#define B_EOTD (1 << 0) // EOTD mode
-#define B_PLAY_UL (1 << 3) // Play UL
-#define B_DCO_ON (1 << 4) // DCO ON/OFF
-#define B_AUDIO_ASYNC (1 << 1) // WCP reserved
-
-// ****************************************************************
-// PARAMETER AREA (PARAM) MCU<->DSP COMMUNICATION DEFINITIONS
-// ****************************************************************
-#define C_POND_RED 1L
-// below values are defined in the file l1_time.h
-//#define D_NSUBB_IDLE 296L
-//#define D_NSUBB_DEDIC 30L
-#define D_FB_THR_DET_IACQ 0x3333L
-#define D_FB_THR_DET_TRACK 0x28f6L
-#define D_DC_OFF_THRES 0x7fffL
-#define D_DUMMY_THRES 17408L
-#define D_DEM_POND_GEWL 26624L
-#define D_DEM_POND_RED 20152L
-#define D_HOLE 0L
-#define D_TRANSFER_RATE 0x6666L
-
-// Full Rate vocoder definitions.
-#define D_MACCTHRESH1 7872L
-#define D_MLDT -4L
-#define D_MACCTHRESH 7872L
-#define D_GU 5772L
-#define D_GO 7872L
-#define D_ATTMAX 53L
-#define D_SM -892L
-#define D_B 208L
-#define D_SD_MIN_THR_TCHFS 15L //(24L *C_POND_RED)
-#define D_MA_MIN_THR_TCHFS 738L //(1200L *C_POND_RED)
-#define D_MD_MAX_THR_TCHFS 1700L //(2000L *C_POND_RED)
-#define D_MD1_MAX_THR_TCHFS 99L //(160L *C_POND_RED)
-
-#if (DSP == 33) || (DSP == 34) || (DSP == 35) || (DSP == 36)
- // Frequency burst definitions
- #define D_FB_MARGIN_BEG 24
- #define D_FB_MARGIN_END 22
-
- // V42bis definitions
- #define D_V42B_SWITCH_HYST 16L
- #define D_V42B_SWITCH_MIN 64L
- #define D_V42B_SWITCH_MAX 250L
- #define D_V42B_RESET_DELAY 10L
-
- // Latencies definitions
- #if (DSP == 33) || (DSP == 34) || (DSP == 35) || (DSP == 36)
- // C.f. BUG1404
- #define D_LAT_MCU_BRIDGE 0x000FL
- #else
- #define D_LAT_MCU_BRIDGE 0x0009L
- #endif
-
- #define D_LAT_MCU_HOM2SAM 0x000CL
-
- #define D_LAT_MCU_BEF_FAST_ACCESS 0x0005L
- #define D_LAT_DSP_AFTER_SAM 0x0004L
-
- // Background Task in GSM mode: Initialization.
- #define D_GSM_BGD_MGT 0L
-
-#if (CHIPSET == 4)
- #define D_MISC_CONFIG 0L
-#elif (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12)
- #define D_MISC_CONFIG 1L
-#else
- #define D_MISC_CONFIG 0L
-#endif
-
-#endif
-
-// Hall Rate vocoder and ched definitions.
-
-#define D_SD_MIN_THR_TCHHS 37L
-#define D_MA_MIN_THR_TCHHS 344L
-#define D_MD_MAX_THR_TCHHS 2175L
-#define D_MD1_MAX_THR_TCHHS 138L
-#define D_SD_AV_THR_TCHHS 1845L
-#define D_WED_FIL_TC 0x7c00L
-#define D_WED_FIL_INI 4650L
-#define D_X_MIN 15L
-#define D_X_MAX 23L
-#define D_Y_MIN 703L
-#define D_Y_MAX 2460L
-#define D_SLOPE 135L
-#define D_WED_DIFF_THRESHOLD 406L
-#define D_MABFI_MIN_THR_TCHHS 5320L
-#define D_LDT_HR -5
-#define D_MACCTRESH_HR 6500
-#define D_MACCTRESH1_HR 6500
-#define D_GU_HR 2620
-#define D_GO_HR 3700
-#define D_B_HR 182
-#define D_SM_HR -1608
-#define D_ATTMAX_HR 53
-
-// Enhanced Full Rate vocoder and ched definitions.
-
-#define C_MLDT_EFR -4
-#define C_MACCTHRESH_EFR 8000
-#define C_MACCTHRESH1_EFR 8000
-#define C_GU_EFR 4522
-#define C_GO_EFR 6500
-#define C_B_EFR 174
-#define C_SM_EFR -878
-#define C_ATTMAX_EFR 53
-#define D_SD_MIN_THR_TCHEFS 15L //(24L *C_POND_RED)
-#define D_MA_MIN_THR_TCHEFS 738L //(1200L *C_POND_RED)
-#define D_MD_MAX_THR_TCHEFS 1230L //(2000L *C_POND_RED)
-#define D_MD1_MAX_THR_TCHEFS 99L //(160L *C_POND_RED)
-
-
-// Integrated Data Services definitions.
-#define D_MAX_OVSPD_UL 8
-// Detect frames containing 90% of 1s as synchro frames
-#define D_SYNC_THRES 0x3f50
-// IDLE frames are only frames with 100 % of 1s
-#define D_IDLE_THRES 0x4000
-#define D_M1_THRES 5
-#define D_MAX_OVSP_DL 8
-
-// d_ra_act: bit field definition
-#define B_F48BLK 5
-
-// Mask for b_itc information (d_ra_conf)
-#define CE_MASK 0x04
-
-#define D_FACCH_THR 0
-#define D_DSP_TEST 0
-#define D_VERSION_NUMBER 0
-#define D_TI_VERSION 0
-
-
-/*------------------------------------------------------------------------------*/
-/* */
-/* DEFINITIONS FOR DSP <-> MCU COMMUNICATION. */
-/* ++++++++++++++++++++++++++++++++++++++++++ */
-/* */
-/*------------------------------------------------------------------------------*/
-// COMMUNICATION Interrupt definition
-//------------------------------------
-#define ALL_16BIT 0xffffL
-#define B_GSM_PAGE (1 << 0)
-#define B_GSM_TASK (1 << 1)
-#define B_MISC_PAGE (1 << 2)
-#define B_MISC_TASK (1 << 3)
-
-#define B_GSM_PAGE_MASK (ALL_16BIT ^ B_GSM_PAGE)
-#define B_GSM_TASK_MASK (ALL_16BIT ^ B_GSM_TASK)
-#define B_MISC_PAGE_MASK (ALL_16BIT ^ B_MISC_PAGE)
-#define B_MISC_TASK_MASK (ALL_16BIT ^ B_MISC_TASK)
-
-// Common definition
-//----------------------------------
-// Index to *_DEMOD* arrays.
-#define D_TOA 0 // Time Of Arrival.
-#define D_PM 1 // Power Measurement.
-#define D_ANGLE 2 // Angle (AFC correction)
-#define D_SNR 3 // Signal / Noise Ratio.
-
-// Bit name/position definitions.
-#define B_FIRE0 5 // Fire result bit 0. (00 -> NO ERROR) (01 -> ERROR CORRECTED)
-#define B_FIRE1 6 // Fire result bit 1. (10 -> ERROR) (11 -> unused)
-#define B_SCH_CRC 8 // CRC result for SB decoding. (1 for ERROR).
-#define B_BLUD 15 // Uplink,Downlink data block Present. (1 for PRESENT).
-#define B_AF 14 // Activity bit: 1 if data block is valid.
-#define B_BFI 2 // Bad Frame Indicator
-#define B_UFI 0 // UNRELIABLE FRAME Indicator
-#define B_ECRC 9 // Enhanced full rate CRC bit
-#define B_EMPTY_BLOCK 10 // for voice memo purpose, this bit is used to determine
-
-#if (DEBUG_DEDIC_TCH_BLOCK_STAT == 1)
- #define FACCH_GOOD 10
- #define FACCH_BAD 11
-#endif
-
-#if (AMR == 1)
- // Place of the RX type in the AMR block header
- #define RX_TYPE_SHIFT 3
- #define RX_TYPE_MASK 0x0038
-
- // Place of the vocoder type in the AMR block header
- #define VOCODER_TYPE_SHIFT 0
- #define VOCODER_TYPE_MASK 0x0007
-
- // List of the possible RX types in a_dd block
- #define SPEECH_GOOD 0
- #define SPEECH_DEGRADED 1
- #define ONSET 2
- #define SPEECH_BAD 3
- #define SID_FIRST 4
- #define SID_UPDATE 5
- #define SID_BAD 6
- #define AMR_NO_DATA 7
- #define AMR_INHIBIT 8
-
- // List of possible RX types in RATSCCH block
- #define C_RATSCCH_GOOD 5
-
- // List of the possible AMR channel rate
- #define AMR_CHANNEL_4_75 0
- #define AMR_CHANNEL_5_15 1
- #define AMR_CHANNEL_5_9 2
- #define AMR_CHANNEL_6_7 3
- #define AMR_CHANNEL_7_4 4
- #define AMR_CHANNEL_7_95 5
- #define AMR_CHANNEL_10_2 6
- #define AMR_CHANNEL_12_2 7
-
- // Types of RATSCCH blocks
- #define C_RATSCCH_UNKNOWN 0
- #define C_RATSCCH_CMI_PHASE_REQ 1
- #define C_RATSCCH_AMR_CONFIG_REQ_MAIN 2
- #define C_RATSCCH_AMR_CONFIG_REQ_ALT 3
- #define C_RATSCCH_AMR_CONFIG_REQ_ALT_IGNORE 4 // Alternative AMR_CONFIG_REQ with updates coming in the next THRES_REQ block
- #define C_RATSCCH_THRES_REQ 5
-
- // These flags define a bitmap that indicates which AMR parameters are being modified by a RATSCCH
- #define C_AMR_CHANGE_CMIP 0
- #define C_AMR_CHANGE_ACS 1
- #define C_AMR_CHANGE_ICM 2
- #define C_AMR_CHANGE_THR1 3
- #define C_AMR_CHANGE_THR2 4
- #define C_AMR_CHANGE_THR3 5
- #define C_AMR_CHANGE_HYST1 6
- #define C_AMR_CHANGE_HYST2 7
- #define C_AMR_CHANGE_HYST3 8
-
- // CMIP default value
- #define C_AMR_CMIP_DEFAULT 1 // According to ETSI specification 05.09, cmip is always 1 by default (new channel, handover...)
-
-#endif
-// "d_ctrl_tch" bits positions for TCH configuration.
-#define B_CHAN_MODE 0
-#define B_CHAN_TYPE 4
-#define B_RESET_SACCH 6
-#define B_VOCODER_ON 7
-#define B_SYNC_TCH_UL 8
-#if (AMR == 1)
- #define B_SYNC_AMR 9
-#else
-#define B_SYNC_TCH_DL 9
-#endif
-#define B_STOP_TCH_UL 10
-#define B_STOP_TCH_DL 11
-#define B_TCH_LOOP 12
-#define B_SUBCHANNEL 15
-
-// "d_ctrl_abb" bits positions for conditionnal loading of abb registers.
-#define B_RAMP 0
-#if ((ANLG_FAM == 1) || (ANLG_FAM == 2) || (ANLG_FAM == 3))
- #define B_BULRAMPDEL 3 // Note: this name is changed
- #define B_BULRAMPDEL2 2 // Note: this name is changed
- #define B_BULRAMPDEL_BIS 9
- #define B_BULRAMPDEL2_BIS 10
-#endif
-#define B_AFC 4
-
-// "d_ctrl_system" bits positions.
-#define B_TSQ 0
-#define B_BCCH_FREQ_IND 3
-#define B_TASK_ABORT 15 // Abort RF tasks for DSP.
-
-/* Channel type definitions for DEDICATED mode */
-#define INVALID_CHANNEL 0
-#define TCH_F 1
-#define TCH_H 2
-#define SDCCH_4 3
-#define SDCCH_8 4
-
-/* Channel mode definitions for DEDICATED mode */
-#define SIG_ONLY_MODE 0 // signalling only
-#define TCH_FS_MODE 1 // speech full rate
-#define TCH_HS_MODE 2 // speech half rate
-#define TCH_96_MODE 3 // data 9,6 kb/s
-#define TCH_48F_MODE 4 // data 4,8 kb/s full rate
-#define TCH_48H_MODE 5 // data 4,8 kb/s half rate
-#define TCH_24F_MODE 6 // data 2,4 kb/s full rate
-#define TCH_24H_MODE 7 // data 2,4 kb/s half rate
-#define TCH_EFR_MODE 8 // enhanced full rate
-#define TCH_144_MODE 9 // data 14,4 kb/s half rate
-
diff --git a/Src/osmoconbb/src/target/firmware/include/calypso/misc.h b/Src/osmoconbb/src/target/firmware/include/calypso/misc.h
deleted file mode 100644
index 4e48093..0000000
--- a/Src/osmoconbb/src/target/firmware/include/calypso/misc.h
+++ /dev/null
@@ -1,8 +0,0 @@
-#ifndef _CAL_MISC_H
-#define _CAL_MISC_H
-
-void memdump_range(unsigned int *ptr, unsigned int len);
-void dump_mem(void);
-void dump_dev_id(void);
-
-#endif /* _CAL_MISC_H */
diff --git a/Src/osmoconbb/src/target/firmware/include/calypso/rtc.h b/Src/osmoconbb/src/target/firmware/include/calypso/rtc.h
deleted file mode 100644
index 17528d0..0000000
--- a/Src/osmoconbb/src/target/firmware/include/calypso/rtc.h
+++ /dev/null
@@ -1,6 +0,0 @@
-#ifndef _CALYPSO_RTC_H
-#define _CALYPSO_RTC_H
-
-void rtc_init(void);
-
-#endif /* _CALYPSO_RTC_H */
diff --git a/Src/osmoconbb/src/target/firmware/include/calypso/sim.h b/Src/osmoconbb/src/target/firmware/include/calypso/sim.h
deleted file mode 100755
index b2a2164..0000000
--- a/Src/osmoconbb/src/target/firmware/include/calypso/sim.h
+++ /dev/null
@@ -1,191 +0,0 @@
-/* Driver for Simcard Controller inside TI Calypso/Iota */
-
-/* (C) 2010 by Philipp Fabian Benedikt Maier <philipp-maier@runningserver.com>
- *
- * All Rights Reserved
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- */
-
-#ifndef _CALYPSO_SIM_H
-#define _CALYPSO_SIM_H
-
-/* == REGISTERS IN THE IOTA BASEBAND == */
-
-/* SimCard Control Register */
-#define VRPCSIM_SIMLEN (1 << 3) /* Enable level shifter */
-#define VRPCSIM_SIMRSU (1 << 2) /* voltage regulator output status */
-#define VRPCSIM_RSIMEN (1 << 1) /* Voltage regulator enable */
-#define VRPCSIM_SIMSEL 1 /* Select the VRSIM output voltage 1=2.9V, 0=1.8V */
-
-
-
-/* == REGISTERS IN THE CALYPSO CPU == */
-
-/* Reg_sim_cmd register (R/W) - FFFE:0000 */
-#define REG_SIM_CMD 0xFFFE0000 /* register address */
-#define REG_SIM_CMD_CMDCARDRST 1 /* SIM card reset sequence */
-#define REG_SIM_CMD_CMDIFRST (1 << 1) /* SIM interface software reset */
-#define REG_SIM_CMD_CMDSTOP (1 << 2) /* SIM card stop procedure */
-#define REG_SIM_CMD_CMDSTART (1 << 3) /* SIM card start procedure */
-#define REG_SIM_CMD_MODULE_CLK_EN (1 << 4) /* Clock of the module */
-
-/* Reg_sim_stat register (R) - FFFE:0002 */
-#define REG_SIM_STAT 0xFFFE0002 /* register address */
-#define REG_SIM_STAT_STATNOCARD 1 /* card presence, 0 = no card, 1 = card detected */
-#define REG_SIM_STAT_STATTXPAR (1 << 1) /* parity check for transmit byte, 0 = parity error, 1 = parity OK */
-#define REG_SIM_STAT_STATFIFOFULL (1 << 2) /* FIFO content, 1 = FIFO full */
-#define REG_SIM_STAT_STATFIFOEMPTY (1 << 3) /* FIFO content, 1 = FIFO empty */
-
-/* Reg_sim_conf1 register (R/W) - FFFE:0004 */
-#define REG_SIM_CONF1 0xFFFE0004 /* register address */
-#define REG_SIM_CONF1_CONFCHKPAR 1 /* enable parity check on reception */
-#define REG_SIM_CONF1_CONFCODCONV (1 << 1) /* coding convention: (TS character) */
-#define REG_SIM_CONF1_CONFTXRX (1 << 2) /* SIO line direction */
-#define REG_SIM_CONF1_CONFSCLKEN (1 << 3) /* SIM clock */
-#define REG_SIM_CONF1_reserved (1 << 4) /* ETU period */
-#define REG_SIM_CONF1_CONFSCLKDIV (1 << 5) /* SIM clock frequency */
-#define REG_SIM_CONF1_CONFSCLKLEV (1 << 6) /* SIM clock idle level */
-#define REG_SIM_CONF1_CONFETUPERIOD (1 << 7) /* ETU period */
-#define REG_SIM_CONF1_CONFBYPASS (1 << 8) /* bypass hardware timers and start and stop sequences */
-#define REG_SIM_CONF1_CONFSVCCLEV (1 << 9) /* logic level on SVCC (used if CONFBYPASS = 1) */
-#define REG_SIM_CONF1_CONFSRSTLEV (1 << 10) /* logic level on SRST (used if CONFBYPASS = 1) */
-#define REG_SIM_CONF1_CONFTRIG 11 /* FIFO trigger level */
-#define REG_SIM_CONF1_CONFTRIG_0 (1 << 11)
-#define REG_SIM_CONF1_CONFTRIG_1 (1 << 12)
-#define REG_SIM_CONF1_CONFTRIG_2 (1 << 13)
-#define REG_SIM_CONF1_CONFTRIG_3 (1 << 14)
-#define REG_SIM_CONF1_CONFTRIG_MASK 0xF
-#define REG_SIM_CONF1_CONFSIOLOW (1 << 15) /* SIO - 0 = no effect, 1 = force low */
-
-/* Reg_sim_conf2 register (R/W) - FFFE:0006 */
-#define REG_SIM_CONF2 0xFFFE0006 /* register address */
-#define REG_SIM_CONF2_CONFTFSIM 0 /* time delay for filtering of SIM_CD */
-#define REG_SIM_CONF2_CONFTFSIM_0 1 /* time-unit = 1024 * TCK13M (card extraction) */
-#define REG_SIM_CONF2_CONFTFSIM_1 (1 << 1) /* or */
-#define REG_SIM_CONF2_CONFTFSIM_2 (1 << 2) /* time-unit = 8192 * TCK13M (card insertion) */
-#define REG_SIM_CONF2_CONFTFSIM_3 (1 << 3)
-#define REG_SIM_CONF2_CONFTFSIM_MASK 0xF
-#define REG_SIM_CONF2_CONFTDSIM 4 /* time delay for contact activation/deactivation */
-#define REG_SIM_CONF2_CONFTDSIM_0 (1 << 4) /* time unit = 8 * TCKETU */
-#define REG_SIM_CONF2_CONFTDSIM_1 (1 << 5)
-#define REG_SIM_CONF2_CONFTDSIM_2 (1 << 6)
-#define REG_SIM_CONF2_CONFTDSIM_3 (1 << 7)
-#define REG_SIM_CONF2_CONFTDSIM_MASK 0xF
-#define REG_SIM_CONF2_CONFWAITI 8 /* CONFWAITI overflow wait time between two received */
-#define REG_SIM_CONF2_CONFWAITI_0 (1 << 8) /* character time unit = 960 *D * TCKETU */
-#define REG_SIM_CONF2_CONFWAITI_1 (1 << 9) /* with D parameter = 1 or 8 (TA1 character) */
-#define REG_SIM_CONF2_CONFWAITI_2 (1 << 10)
-#define REG_SIM_CONF2_CONFWAITI_3 (1 << 11)
-#define REG_SIM_CONF2_CONFWAITI_4 (1 << 12)
-#define REG_SIM_CONF2_CONFWAITI_5 (1 << 13)
-#define REG_SIM_CONF2_CONFWAITI_6 (1 << 14)
-#define REG_SIM_CONF2_CONFWAITI_7 (1 << 15)
-#define REG_SIM_CONF2_CONFWAITI_MASK 0xFF
-
-/* Reg_sim_it register (R) - FFFE:0008 */
-#define REG_SIM_IT 0xFFFE0008 /* register address */
-#define REG_SIM_IT_SIM_NATR 1 /* 0 = on read access to REG_SIM_IT, 1 = no answer to reset */
-#define REG_SIM_IT_SIM_WT (1 << 1) /* 0 = on read access to REG_SIM_IT, 1 = character underflow */
-#define REG_SIM_IT_SIM_OV (1 << 2) /* 0 = on read access to REG_SIM_IT, 1 = receive overflow */
-#define REG_SIM_IT_SIM_TX (1 << 3) /* 0 = on write access to REG_SIM_DTX or */
- /* on switching from transmit to receive, mode (CONFTXRX bit) */
- /* 1 = waiting for character to transmit */
-#define REG_SIM_IT_SIM_RX (1 << 4) /* 0 = on read access to REG_SIM_DRX */
- /* 1 = waiting characters to be read */
-
-/* Reg_sim_drx register (R) - FFFE:000A */
-#define REG_SIM_DRX 0xFFFE000A /* register address */
-#define REG_SIM_DRX_SIM_DRX 0 /* next data byte in FIFO available for reading */
-#define REG_SIM_DRX_SIM_DRX_0 1
-#define REG_SIM_DRX_SIM_DRX_1 (1 << 1)
-#define REG_SIM_DRX_SIM_DRX_2 (1 << 2)
-#define REG_SIM_DRX_SIM_DRX_3 (1 << 3)
-#define REG_SIM_DRX_SIM_DRX_4 (1 << 4)
-#define REG_SIM_DRX_SIM_DRX_5 (1 << 5)
-#define REG_SIM_DRX_SIM_DRX_6 (1 << 6)
-#define REG_SIM_DRX_SIM_DRX_7 (1 << 7)
-#define REG_SIM_DRX_SIM_DRX_MASK 0xFF
-#define REG_SIM_DRX_STATRXPAR (1 << 8) /* parity-check for received byte */
-
-/* Reg_sim_dtx register (R/W) - FFFE:000C */
-#define REG_SIM_DTX 0xFFFE000C /* register address */
-#define REG_SIM_DTX_SIM_DTX_0 /* next data byte to be transmitted */
-#define REG_SIM_DTX_SIM_DTX_1
-#define REG_SIM_DTX_SIM_DTX_2
-#define REG_SIM_DTX_SIM_DTX_3
-#define REG_SIM_DTX_SIM_DTX_4
-#define REG_SIM_DTX_SIM_DTX_5
-#define REG_SIM_DTX_SIM_DTX_6
-#define REG_SIM_DTX_SIM_DTX_7
-
-/* Reg_sim_maskit register (R/W) - FFFE:000E */
-#define REG_SIM_MASKIT 0xFFFE000E /* register address */
-#define REG_SIM_MASKIT_MASK_SIM_NATR 1 /* No-answer-to-reset interrupt */
-#define REG_SIM_MASKIT_MASK_SIM_WT (1 << 1) /* Character wait-time overflow interrupt */
-#define REG_SIM_MASKIT_MASK_SIM_OV (1 << 2) /* Receive overflow interrupt */
-#define REG_SIM_MASKIT_MASK_SIM_TX (1 << 3) /* Waiting character to transmit interrupt */
-#define REG_SIM_MASKIT_MASK_SIM_RX (1 << 4) /* Waiting characters to be read interrupt */
-#define REG_SIM_MASKIT_MASK_SIM_CD (1 << 5) /* SIM card insertion/extraction interrupt */
-
-/* Reg_sim_it_cd register (R) - FFFE:0010 */
-#define REG_SIM_IT_CD 0xFFFE0010 /* register address */
-#define REG_SIM_IT_CD_IT_CD 1 /* 0 = on read access to REG_SIM_IT_CD, */
- /* 1 = SIM card insertion/extraction */
-
-
-#define SIM_DEBUG_OUTPUTDELAY 200 /* Output delay to minimize stress with some uart bugs */
-#define SIM_DEBUG 0 /* 0=Debug messages are off / 1=Debug messages are on */
-#define SIM_OPERATION_DELAY 100 /* Time between operations like reset, vcc apply ect... */
-
-
-void calypso_sim_regdump(void); /* Display Register dump */
-
-int calypso_sim_powerup(uint8_t *atr); /* Apply power to the simcard (see note 1) */
-int calypso_sim_reset(uint8_t *atr); /* reset the simcard (see note 1) */
-
-
-void calypso_sim_powerdown(void); /* Powerdown simcard */
-
-/* APDU transmission modes */
-#define SIM_APDU_PUT 0 /* Transmit a data body to the card */
-#define SIM_APDU_GET 1 /* Fetch data from the card eg. GET RESOPNSE */
-
-/* Transceive T0 Apdu to sim acording to GSM 11.11 Page 34 */
-int calypso_sim_transceive(uint8_t cla, /* Class (in GSM context mostly 0xA0 */
- uint8_t ins, /* Instruction */
- uint8_t p1, /* First parameter */
- uint8_t p2, /* Second parameter */
- uint8_t p3le, /* Length of the data that should be transceived */
- uint8_t *data, /* Data payload */
- uint8_t *status, /* Status word (2 byte array, see note 1) */
- uint8_t mode); /* Mode of operation: 1=GET, 0=PUT */
-
- /* Note 1: You can use a null-pointer (0) if you are not interested in
- the status word */
-
-/* Transmission of raw data */
-int calypso_sim_receive(uint8_t *data); /* Receive raw data through the sim interface */
-int calypso_sim_transmit(uint8_t *data, int length); /* Transmit raw data through the sim interface */
-
-void calypso_sim_init(void); /* Initialize simcard interface */
-
-
-/* Known Bugs:
- 1.) After powering down the simcard communication stops working
-*/
-
-#endif /* _CALYPSO_SIM_H */
diff --git a/Src/osmoconbb/src/target/firmware/include/calypso/timer.h b/Src/osmoconbb/src/target/firmware/include/calypso/timer.h
deleted file mode 100644
index 694e4eb..0000000
--- a/Src/osmoconbb/src/target/firmware/include/calypso/timer.h
+++ /dev/null
@@ -1,25 +0,0 @@
-#ifndef _CAL_TIMER_H
-#define _CAL_TIMER_H
-
-/* Enable or Disable a timer */
-void hwtimer_enable(int num, int on);
-
-/* Configure pre-scaler and if timer is auto-reload */
-void hwtimer_config(int num, uint8_t pre_scale, int auto_reload);
-
-/* Load a timer with the given value */
-void hwtimer_load(int num, uint16_t val);
-
-/* Read the current timer value */
-uint16_t hwtimer_read(int num);
-
-/* Enable or disable the watchdog */
-void wdog_enable(int on);
-
-/* Reset cpu using watchdog */
-void wdog_reset(void);
-
-/* power up the timers */
-void hwtimer_init(void);
-
-#endif /* _CAL_TIMER_H */
diff --git a/Src/osmoconbb/src/target/firmware/include/calypso/tpu.h b/Src/osmoconbb/src/target/firmware/include/calypso/tpu.h
deleted file mode 100644
index 3b1b600..0000000
--- a/Src/osmoconbb/src/target/firmware/include/calypso/tpu.h
+++ /dev/null
@@ -1,122 +0,0 @@
-#ifndef _CALYPSO_TPU_H
-#define _CALYPSO_TPU_H
-
-#define BITS_PER_TDMA 1250
-#define QBITS_PER_TDMA (BITS_PER_TDMA * 4) /* 5000 */
-#define TPU_RANGE QBITS_PER_TDMA
-#define SWITCH_TIME (TPU_RANGE-10)
-
-/* Assert or de-assert TPU reset */
-void tpu_reset(int active);
-/* Enable or Disable a new scenario loaded into the TPU */
-void tpu_enable(int active);
-/* Enable or Disable the clock of the TPU Module */
-void tpu_clk_enable(int active);
-/* Enable Frame Interrupt generation on next frame. DSP will reset it */
-void tpu_dsp_frameirq_enable(void);
-/* Is a Frame interrupt still pending for the DSP ? */
-int tpu_dsp_fameirq_pending(void);
-/* Rewind the TPU, i.e. restart enqueueing instructions at the base addr */
-void tpu_rewind(void);
-/* Enqueue a raw TPU instruction */
-void tpu_enqueue(uint16_t instr);
-/* Initialize TPU and TPU driver */
-void tpu_init(void);
-/* (Busy)Wait until TPU is idle */
-void tpu_wait_idle(void);
-/* Enable FRAME interrupt generation */
-void tpu_frame_irq_en(int mcu, int dsp);
-/* Force the generation of a DSP interrupt */
-void tpu_force_dsp_frame_irq(void);
-
-/* Get the current TPU SYNCHRO register */
-uint16_t tpu_get_synchro(void);
-/* Get the current TPU OFFSET register */
-uint16_t tpu_get_offset(void);
-
-enum tpu_instr {
- TPU_INSTR_AT = (1 << 13),
- TPU_INSTR_OFFSET = (2 << 13),
- TPU_INSTR_SYNCHRO = (3 << 13), /* Loading delta synchro value in TPU synchro register */
- TPU_INSTR_WAIT = (5 << 13), /* Wait a certain period (in GSM qbits) */
- TPU_INSTR_SLEEP = (0 << 13), /* Stop the sequencer by disabling TPU ENABLE bit in ctrl reg */
- /* data processing */
- TPU_INSTR_MOVE = (4 << 13),
-};
-
-/* Addresses internal to the TPU, only accessible via MOVE */
-enum tpu_reg_int {
- TPUI_TSP_CTRL1 = 0x00,
- TPUI_TSP_CTRL2 = 0x01,
- TPUI_TX_1 = 0x04,
- TPUI_TX_2 = 0x03,
- TPUI_TX_3 = 0x02,
- TPUI_TX_4 = 0x05,
- TPUI_TSP_ACT_L = 0x06,
- TPUI_TSP_ACT_U = 0x07,
- TPUI_TSP_SET1 = 0x09,
- TPUI_TSP_SET2 = 0x0a,
- TPUI_TSP_SET3 = 0x0b,
- TPUI_DSP_INT_PG = 0x10,
- TPUI_GAUGING_EN = 0x11,
-};
-
-enum tpui_ctrl2_bits {
- TPUI_CTRL2_RD = (1 << 0),
- TPUI_CTRL2_WR = (1 << 1),
-};
-
-static inline uint16_t tpu_mod5000(int16_t time)
-{
- if (time < 0)
- return time + 5000;
- if (time >= 5000)
- return time - 5000;
- return time;
-}
-
-/* Enqueue a SLEEP operation (stop sequencer by disabling TPU ENABLE bit) */
-static inline void tpu_enq_sleep(void)
-{
- tpu_enqueue(TPU_INSTR_SLEEP);
-}
-
-/* Enqueue a MOVE operation */
-static inline void tpu_enq_move(uint8_t addr, uint8_t data)
-{
- tpu_enqueue(TPU_INSTR_MOVE | (data << 5) | (addr & 0x1f));
-}
-
-/* Enqueue an AT operation */
-static inline void tpu_enq_at(int16_t time)
-{
- tpu_enqueue(TPU_INSTR_AT | tpu_mod5000(time));
-}
-
-/* Enqueue a SYNC operation */
-static inline void tpu_enq_sync(int16_t time)
-{
- tpu_enqueue(TPU_INSTR_SYNCHRO | time);
-}
-
-/* Enqueue a WAIT operation */
-static inline void tpu_enq_wait(int16_t time)
-{
- tpu_enqueue(TPU_INSTR_WAIT | time);
-}
-
-/* Enqueue an OFFSET operation */
-static inline void tpu_enq_offset(int16_t time)
-{
- tpu_enqueue(TPU_INSTR_OFFSET | time);
-}
-
-static inline void tpu_enq_dsp_irq(void)
-{
- tpu_enq_move(TPUI_DSP_INT_PG, 0x0001);
-}
-
-/* add two numbers, modulo 5000, and ensure the result is positive */
-uint16_t add_mod5000(int16_t a, int16_t b);
-
-#endif /* _CALYPSO_TPU_H */
diff --git a/Src/osmoconbb/src/target/firmware/include/calypso/tsp.h b/Src/osmoconbb/src/target/firmware/include/calypso/tsp.h
deleted file mode 100644
index d58a562..0000000
--- a/Src/osmoconbb/src/target/firmware/include/calypso/tsp.h
+++ /dev/null
@@ -1,31 +0,0 @@
-#ifndef _CALYPSO_TSP_H
-#define _CALYPSO_TSP_H
-
-#define TSPACT(x) (1 << x)
-#define TSPEN(x) (x)
-
-/* initiate a TSP write through the TPU */
-void tsp_write(uint8_t dev_idx, uint8_t bitlen, uint32_t dout);
-
-/* Configure clock edge and chip enable polarity for a device */
-void tsp_setup(uint8_t dev_idx, int clk_rising, int en_positive, int en_edge);
-
-/* Obtain the current tspact state */
-uint16_t tsp_act_state(void);
-
-/* Update the TSPACT state, including enable and disable */
-void tsp_act_update(uint16_t new_act);
-
-/* Enable one or multiple TSPACT signals */
-void tsp_act_enable(uint16_t bitmask);
-
-/* Disable one or multiple TSPACT signals */
-void tsp_act_disable(uint16_t bitmask);
-
-/* Toggle one or multiple TSPACT signals */
-void tsp_act_toggle(uint16_t bitmask);
-
-/* Initialize TSP driver */
-void tsp_init(void);
-
-#endif /* _CALYPSO_TSP_H */
diff --git a/Src/osmoconbb/src/target/firmware/include/comm/msgb.h b/Src/osmoconbb/src/target/firmware/include/comm/msgb.h
deleted file mode 100644
index 10cff9b..0000000
--- a/Src/osmoconbb/src/target/firmware/include/comm/msgb.h
+++ /dev/null
@@ -1,161 +0,0 @@
-#ifndef _MSGB_H
-#define _MSGB_H
-
-/* (C) 2008-2010 by Harald Welte <laforge@gnumonks.org>
- * All Rights Reserved
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- */
-
-#include <osmocom/core/linuxlist.h>
-#include <console.h>
-
-struct msgb {
- struct llist_head list;
-
- /* the layer 1 header, if any */
- unsigned char *l1h;
- /* the A-bis layer 2 header: OML, RSL(RLL), NS */
- unsigned char *l2h;
- /* the layer 3 header. For OML: FOM; RSL: 04.08; GPRS: BSSGP */
- unsigned char *l3h;
-
- uint16_t data_len;
- uint16_t len;
-
- unsigned char *head; /* start of buffer */
- unsigned char *tail; /* end of message */
- unsigned char *data; /* start of message */
- unsigned char _data[0];
-};
-
-extern struct msgb *msgb_alloc(uint16_t size, const char *name);
-extern void msgb_free(struct msgb *m);
-extern void msgb_enqueue(struct llist_head *queue, struct msgb *msg);
-extern struct msgb *msgb_dequeue(struct llist_head *queue);
-extern void msgb_reset(struct msgb *m);
-
-#define msgb_l1(m) ((void *)(m->l1h))
-#define msgb_l2(m) ((void *)(m->l2h))
-#define msgb_l3(m) ((void *)(m->l3h))
-
-static inline unsigned int msgb_l1len(const struct msgb *msgb)
-{
- return msgb->tail - (uint8_t *)msgb_l1(msgb);
-}
-
-static inline unsigned int msgb_l2len(const struct msgb *msgb)
-{
- return msgb->tail - (uint8_t *)msgb_l2(msgb);
-}
-
-static inline unsigned int msgb_l3len(const struct msgb *msgb)
-{
- return msgb->tail - (uint8_t *)msgb_l3(msgb);
-}
-
-static inline unsigned int msgb_headlen(const struct msgb *msgb)
-{
- return msgb->len - msgb->data_len;
-}
-static inline int msgb_tailroom(const struct msgb *msgb)
-{
- return (msgb->head + msgb->data_len) - msgb->tail;
-}
-static inline unsigned char *msgb_put(struct msgb *msgb, unsigned int len)
-{
- unsigned char *tmp = msgb->tail;
-
- /* we intentionally call cons_puts() here to display an allocation
- * failure on the _other_ serial port (i.e. the one that doesn't
- * have the HDLC layer on it */
- if (msgb_tailroom(msgb) < len)
- cons_puts("msgb_tailroom insufficient!\n");
-
- msgb->tail += len;
- msgb->len += len;
- return tmp;
-}
-static inline void msgb_put_u8(struct msgb *msgb, uint8_t word)
-{
- uint8_t *space = msgb_put(msgb, 1);
- space[0] = word & 0xFF;
-}
-static inline void msgb_put_u16(struct msgb *msgb, uint16_t word)
-{
- uint8_t *space = msgb_put(msgb, 2);
- space[0] = word >> 8 & 0xFF;
- space[1] = word & 0xFF;
-}
-static inline void msgb_put_u32(struct msgb *msgb, uint32_t word)
-{
- uint8_t *space = msgb_put(msgb, 4);
- space[0] = word >> 24 & 0xFF;
- space[1] = word >> 16 & 0xFF;
- space[2] = word >> 8 & 0xFF;
- space[3] = word & 0xFF;
-}
-static inline unsigned char *msgb_get(struct msgb *msgb, unsigned int len)
-{
- unsigned char *tmp = msgb->data;
- msgb->data += len;
- msgb->len -= len;
- return tmp;
-}
-static inline uint8_t msgb_get_u8(struct msgb *msgb)
-{
- uint8_t *space = msgb_get(msgb, 1);
- return space[0];
-}
-static inline uint16_t msgb_get_u16(struct msgb *msgb)
-{
- uint8_t *space = msgb_get(msgb, 2);
- return space[0] << 8 | space[1];
-}
-static inline uint32_t msgb_get_u32(struct msgb *msgb)
-{
- uint8_t *space = msgb_get(msgb, 4);
- return space[0] << 24 | space[1] << 16 | space[2] << 8 | space[3];
-}
-static inline unsigned char *msgb_push(struct msgb *msgb, unsigned int len)
-{
- msgb->data -= len;
- msgb->len += len;
- return msgb->data;
-}
-static inline unsigned char *msgb_pull(struct msgb *msgb, unsigned int len)
-{
- msgb->len -= len;
- return msgb->data += len;
-}
-
-/* increase the headroom of an empty msgb, reducing the tailroom */
-static inline void msgb_reserve(struct msgb *msg, int len)
-{
- msg->data += len;
- msg->tail += len;
-}
-
-static inline struct msgb *msgb_alloc_headroom(int size, int headroom,
- const char *name)
-{
- struct msgb *msg = msgb_alloc(size, name);
- if (msg)
- msgb_reserve(msg, headroom);
- return msg;
-}
-
-#endif /* _MSGB_H */
diff --git a/Src/osmoconbb/src/target/firmware/include/comm/sercomm.h b/Src/osmoconbb/src/target/firmware/include/comm/sercomm.h
deleted file mode 100644
index 54256b5..0000000
--- a/Src/osmoconbb/src/target/firmware/include/comm/sercomm.h
+++ /dev/null
@@ -1,57 +0,0 @@
-#ifndef _SERCOMM_H
-#define _SERCOMM_H
-
-/* SERCOMM layer on UART1 (modem UART) */
-
-#include <osmocom/core/msgb.h>
-
-#define SERCOMM_UART_NR 1
-
-#define HDLC_FLAG 0x7E
-#define HDLC_ESCAPE 0x7D
-
-#define HDLC_C_UI 0x03
-#define HDLC_C_P_BIT (1 << 4)
-#define HDLC_C_F_BIT (1 << 4)
-
-/* a low sercomm_dlci means high priority. A high DLCI means low priority */
-enum sercomm_dlci {
- SC_DLCI_HIGHEST = 0,
- SC_DLCI_DEBUG = 4,
- SC_DLCI_L1A_L23 = 5,
- SC_DLCI_LOADER = 9,
- SC_DLCI_CONSOLE = 10,
- SC_DLCI_ECHO = 128,
- _SC_DLCI_MAX
-};
-
-void sercomm_init(void);
-int sercomm_initialized(void);
-
-/* User Interface: Tx */
-
-/* user interface for transmitting messages for a given DLCI */
-void sercomm_sendmsg(uint8_t dlci, struct msgb *msg);
-/* how deep is the Tx queue for a given DLCI */
-unsigned int sercomm_tx_queue_depth(uint8_t dlci);
-
-/* User Interface: Rx */
-
-/* receiving messages for a given DLCI */
-typedef void (*dlci_cb_t)(uint8_t dlci, struct msgb *msg);
-int sercomm_register_rx_cb(uint8_t dlci, dlci_cb_t cb);
-
-/* Driver Interface */
-
-/* fetch one octet of to-be-transmitted serial data. returns 0 if no more data */
-int sercomm_drv_pull(uint8_t *ch);
-/* the driver has received one byte, pass it into sercomm layer.
- returns 1 in case of success, 0 in case of unrecognized char */
-int sercomm_drv_rx_char(uint8_t ch);
-
-static inline struct msgb *sercomm_alloc_msgb(unsigned int len)
-{
- return msgb_alloc_headroom(len+4, 4, "sercomm_tx");
-}
-
-#endif /* _SERCOMM_H */
diff --git a/Src/osmoconbb/src/target/firmware/include/comm/sercomm_cons.h b/Src/osmoconbb/src/target/firmware/include/comm/sercomm_cons.h
deleted file mode 100644
index 11f6654..0000000
--- a/Src/osmoconbb/src/target/firmware/include/comm/sercomm_cons.h
+++ /dev/null
@@ -1,10 +0,0 @@
-#ifndef _SERCOMM_CONS_H
-#define _SERCOMM_CONS_H
-
-/* how large buffers do we allocate? */
-#define SERCOMM_CONS_ALLOC 256
-
-int sercomm_puts(const char *s);
-int sercomm_putchar(int c);
-
-#endif /* _SERCOMM_CONS_H */
diff --git a/Src/osmoconbb/src/target/firmware/include/comm/timer.h b/Src/osmoconbb/src/target/firmware/include/comm/timer.h
deleted file mode 100644
index db7d1a5..0000000
--- a/Src/osmoconbb/src/target/firmware/include/comm/timer.h
+++ /dev/null
@@ -1,76 +0,0 @@
-/*
- * (C) 2008, 2009 by Holger Hans Peter Freyther <zecke@selfish.org>
- * All Rights Reserved
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- */
-
-#ifndef TIMER_H
-#define TIMER_H
-
-#include <sys/time.h>
-
-#include <osmocom/core/linuxlist.h>
-
-/**
- * Timer management:
- * - Create a struct osmo_timer_list
- * - Fill out timeout and use add_timer or
- * use schedule_timer to schedule a timer in
- * x seconds and microseconds from now...
- * - Use del_timer to remove the timer
- *
- * Internally:
- * - We hook into select.c to give a timeval of the
- * nearest timer. On already passed timers we give
- * it a 0 to immediately fire after the select
- * - update_timers will call the callbacks and remove
- * the timers.
- *
- */
-struct osmo_timer_list {
- struct llist_head entry;
- unsigned long expires;
-
- unsigned int active : 1;
- unsigned int handled : 1;
- unsigned int in_list : 1;
-
- void (*cb)(void*);
- void *data;
-};
-
-extern unsigned long volatile jiffies;
-
-/**
- * timer management
- */
-void add_timer(struct osmo_timer_list *timer);
-void schedule_timer(struct osmo_timer_list *timer, int miliseconds);
-void del_timer(struct osmo_timer_list *timer);
-int timer_pending(struct osmo_timer_list *timer);
-
-
-/**
- * internal timer list management
- */
-void prepare_timers(void);
-int update_timers(void);
-int timer_check(void);
-
-void timer_init(void);
-
-#endif
diff --git a/Src/osmoconbb/src/target/firmware/include/console.h b/Src/osmoconbb/src/target/firmware/include/console.h
deleted file mode 100644
index 7146e99..0000000
--- a/Src/osmoconbb/src/target/firmware/include/console.h
+++ /dev/null
@@ -1,20 +0,0 @@
-#ifndef _CONSOLE_H
-#define _CONSOLE_H
-
-/* This is the direct (IRQ driven) UART console, bypassing the HDLC layer.
- * You should not need to call those functions unless you've decided to
- * not use the HLDC layer or have a device with two UARTs */
-
-int cons_rb_append(const char *data, int len);
-int cons_puts(const char *s);
-int cons_putchar(char c);
-int cons_rb_flush(void);
-void cons_init(void);
-
-/* We want the console on UART 0 (IRDA UART) */
-#define CONS_UART_NR 0
-
-/* Size of the static ring-buffer that we keep for console print messages */
-#define CONS_RB_SIZE 4096
-
-#endif /* _CONSOLE_H */
diff --git a/Src/osmoconbb/src/target/firmware/include/ctors.h b/Src/osmoconbb/src/target/firmware/include/ctors.h
deleted file mode 100644
index ee4c7b3..0000000
--- a/Src/osmoconbb/src/target/firmware/include/ctors.h
+++ /dev/null
@@ -1,16 +0,0 @@
-#ifndef _CTORS_H
-#define _CTORS_H
-
-#if 0
-/* only supported by gcc 3.4 or later */
-#define __ctor_data __attribute__ ((constructor) (100))
-#define __ctor_board __attribute__ ((constructor) (200))
-#else
-#define __ctor_data __attribute__ ((constructor))
-#define __ctor_board __attribute__ ((constructor))
-#endif
-
-/* iterate over list of constructor functions and call each element */
-void do_global_ctors(const char *ctors_start, const char *ctors_end);
-
-#endif
diff --git a/Src/osmoconbb/src/target/firmware/include/ctype.h b/Src/osmoconbb/src/target/firmware/include/ctype.h
deleted file mode 100644
index afa3639..0000000
--- a/Src/osmoconbb/src/target/firmware/include/ctype.h
+++ /dev/null
@@ -1,54 +0,0 @@
-#ifndef _LINUX_CTYPE_H
-#define _LINUX_CTYPE_H
-
-/*
- * NOTE! This ctype does not handle EOF like the standard C
- * library is required to.
- */
-
-#define _U 0x01 /* upper */
-#define _L 0x02 /* lower */
-#define _D 0x04 /* digit */
-#define _C 0x08 /* cntrl */
-#define _P 0x10 /* punct */
-#define _S 0x20 /* white space (space/lf/tab) */
-#define _X 0x40 /* hex digit */
-#define _SP 0x80 /* hard space (0x20) */
-
-extern unsigned char _ctype[];
-
-#define __ismask(x) (_ctype[(int)(unsigned char)(x)])
-
-#define isalnum(c) ((__ismask(c)&(_U|_L|_D)) != 0)
-#define isalpha(c) ((__ismask(c)&(_U|_L)) != 0)
-#define iscntrl(c) ((__ismask(c)&(_C)) != 0)
-#define isdigit(c) ((__ismask(c)&(_D)) != 0)
-#define isgraph(c) ((__ismask(c)&(_P|_U|_L|_D)) != 0)
-#define islower(c) ((__ismask(c)&(_L)) != 0)
-#define isprint(c) ((__ismask(c)&(_P|_U|_L|_D|_SP)) != 0)
-#define ispunct(c) ((__ismask(c)&(_P)) != 0)
-#define isspace(c) ((__ismask(c)&(_S)) != 0)
-#define isupper(c) ((__ismask(c)&(_U)) != 0)
-#define isxdigit(c) ((__ismask(c)&(_D|_X)) != 0)
-
-#define isascii(c) (((unsigned char)(c))<=0x7f)
-#define toascii(c) (((unsigned char)(c))&0x7f)
-
-static inline unsigned char __tolower(unsigned char c)
-{
- if (isupper(c))
- c -= 'A'-'a';
- return c;
-}
-
-static inline unsigned char __toupper(unsigned char c)
-{
- if (islower(c))
- c -= 'a'-'A';
- return c;
-}
-
-#define tolower(c) __tolower(c)
-#define toupper(c) __toupper(c)
-
-#endif
diff --git a/Src/osmoconbb/src/target/firmware/include/debug.h b/Src/osmoconbb/src/target/firmware/include/debug.h
deleted file mode 100644
index 27c4185..0000000
--- a/Src/osmoconbb/src/target/firmware/include/debug.h
+++ /dev/null
@@ -1,31 +0,0 @@
-#ifndef _DEBUG_H
-#define _DEBUG_H
-
-#ifndef ARRAY_SIZE
-#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
-#endif
-
-/*
- * Check at compile time that something is of a particular type.
- * Always evaluates to 1 so you may use it easily in comparisons.
- */
-#define typecheck(type,x) \
-({ type __dummy; \
- typeof(x) __dummy2; \
- (void)(&__dummy == &__dummy2); \
- 1; \
-})
-
-#ifdef DEBUG
-#define dputchar(x) putchar(x)
-#define dputs(x) puts(x)
-#define dphex(x,y) phex(x,y)
-#define printd(x, args ...) printf(x, ## args)
-#else
-#define dputchar(x)
-#define dputs(x)
-#define dphex(x,y)
-#define printd(x, args ...)
-#endif
-
-#endif /* _DEBUG_H */
diff --git a/Src/osmoconbb/src/target/firmware/include/defines.h b/Src/osmoconbb/src/target/firmware/include/defines.h
deleted file mode 100644
index 3c8732f..0000000
--- a/Src/osmoconbb/src/target/firmware/include/defines.h
+++ /dev/null
@@ -1,18 +0,0 @@
-
-#ifndef _DEFINES_H
-#define _DEFINES_H
-
-#define __attribute_const__ __attribute__((__const__))
-
-/* type properties */
-#define __packed __attribute__((packed))
-#define __aligned(alignment) __attribute__((aligned(alignment)))
-#define __unused __attribute__((unused))
-
-/* linkage */
-#define __section(name) __attribute__((section(name)))
-
-/* force placement in zero-waitstate memory */
-#define __ramtext __section(".ramtext")
-
-#endif /* !_DEFINES_H */
diff --git a/Src/osmoconbb/src/target/firmware/include/delay.h b/Src/osmoconbb/src/target/firmware/include/delay.h
deleted file mode 100644
index 0d6f3ef..0000000
--- a/Src/osmoconbb/src/target/firmware/include/delay.h
+++ /dev/null
@@ -1,7 +0,0 @@
-#ifndef delay_h
-#define delay_h
-
-void delay_ms(unsigned int ms);
-void delay_us(unsigned int us);
-
-#endif
diff --git a/Src/osmoconbb/src/target/firmware/include/display.h b/Src/osmoconbb/src/target/firmware/include/display.h
deleted file mode 100644
index 89d02a5..0000000
--- a/Src/osmoconbb/src/target/firmware/include/display.h
+++ /dev/null
@@ -1,48 +0,0 @@
-#ifndef _DISPLAY_DRIVER_H
-#define _DISPLAY_DRIVER_H
-
-enum display_attr {
- DISP_ATTR_INVERT = 0x0001,
-};
-
-struct display_driver {
- char *name;
- void (*init)(void);
- void (*set_attr)(unsigned long attr);
- void (*unset_attr)(unsigned long attr);
- void (*clrscr)(void);
- void (*goto_xy)(int xpos, int ypos);
- void (*set_color)(int fgcolor, int bgcolor);
- int (*putc)(unsigned char c);
- int (*puts)(const char *str);
-};
-
-extern struct display_driver *display;
-
-static inline void display_init(void)
-{
- display->init();
-}
-static inline void display_set_attr(unsigned long attr)
-{
- display->set_attr(attr);
-}
-static inline void display_unset_attr(unsigned long attr)
-{
- display->unset_attr(attr);
-}
-static inline void display_clrscr(void)
-{
- display->clrscr();
-}
-static inline int display_putchar(unsigned char c)
-{
- return display->putc(c);
-}
-int display_puts(const char *s);
-
-extern const struct display_driver st7558_display;
-extern const struct display_driver ssd1783_display;
-extern const struct display_driver td014_display;
-
-#endif
diff --git a/Src/osmoconbb/src/target/firmware/include/display/ssd1783.h b/Src/osmoconbb/src/target/firmware/include/display/ssd1783.h
deleted file mode 100644
index c72eeba..0000000
--- a/Src/osmoconbb/src/target/firmware/include/display/ssd1783.h
+++ /dev/null
@@ -1,56 +0,0 @@
-#ifndef _SSD1783_H
-#define _SSD1783_H
-
-/* Some basic colors */
-#define RED 0x0f00
-#define GREEN 0x00f0
-#define BLUE 0x000f
-#define YELLOW 0x0ff0
-#define MAGENTA 0x0f0f
-#define CYAN 0x00ff
-#define BLACK 0x0000
-#define WHITE 0x0fff
-
-/* Epson S1D15G10D08B000 commandset */
-#define CMD_DISON 0xaf // Display on
-#define CMD_DISOFF 0xae // Display off
-#define CMD_DISNOR 0xa6 // Normal display
-#define CMD_DISINV 0xa7 // Inverse display
-#define CMD_COMSCN 0xbb // Common scan direction
-#define CMD_DISCTL 0xca // Display control
-#define CMD_SLPIN 0x95 // Sleep in
-#define CMD_SLPOUT 0x94 // Sleep out
-#define CMD_PASET 0x75 // Page address set
-#define CMD_CASET 0x15 // Column address set
-#define CMD_DATCTL 0xbc // Data scan direction, etc.
-#define CMD_RGBSET8 0xce // 256-color position set
-#define CMD_RAMWR 0x5c // Writing to memory
-#define CMD_RAMRD 0x5d // Reading from memory
-#define CMD_PTLIN 0xa8 // Partial display in
-#define CMD_PTLOUT 0xa9 // Partial display out
-#define CMD_RMWIN 0xe0 // Read and modify write
-#define CMD_RMWOUT 0xee // End
-#define CMD_ASCSE 0xaa // Area scroll set
-#define CMD_SCSTART 0xab // Scroll start set
-#define CMD_OSCON 0xd1 // Internal oscillation on
-#define CMD_OSCOFF 0xd2 // Internal oscillation off
-#define CMD_PWRCTR 0x20 // Power control
-#define CMD_VOLCTR 0x81 // Electronic volume control
-#define CMD_VOLUP 0xd6 // Increment electronic control by 1
-#define CMD_VOLDOWN 0xd7 // Decrement electronic control by 1
-#define CMD_TMPGRD 0x82 // Temperature gradient set
-#define CMD_EPCTIN 0xcd // Control EEPROM
-#define CMD_EPCOUT 0xcc // Cancel EEPROM control
-#define CMD_EPMWR 0xfc // Write into EEPROM
-#define CMD_EPMRD 0xfd // Read from EEPROM
-#define CMD_EPSRRD1 0x7c // Read register 1
-#define CMD_EPSRRD2 0x7d // Read register 2
-#define CMD_NOP 0x25 // NOP instruction
-
-/* Extended SSD1783 commandset, partly (also has HW graphic functionalities) */
-#define CMD_BIASSET 0xfb // Set bias ratio
-#define CMD_FREQSET 0xf2 // Set frequency and n-line inversion
-#define CMD_RESCMD 0xa2 // reserved command
-#define CMD_PWMSEL 0xf7 // Select PWM/FRC, Full/8 color mode
-
-#endif
diff --git a/Src/osmoconbb/src/target/firmware/include/flash/cfi_flash.h b/Src/osmoconbb/src/target/firmware/include/flash/cfi_flash.h
deleted file mode 100644
index 9d8b33a..0000000
--- a/Src/osmoconbb/src/target/firmware/include/flash/cfi_flash.h
+++ /dev/null
@@ -1,41 +0,0 @@
-
-#ifndef _CFI_FLASH_H
-#define _CFI_FLASH_H
-
-#include <stdint.h>
-
-#define FLASH_MAX_REGIONS 4
-
-typedef struct {
- void *fr_base;
- size_t fr_bnum;
- size_t fr_bsize;
-} flash_region_t;
-
-typedef struct {
- void *f_base;
- size_t f_size;
-
- size_t f_nregions;
- flash_region_t f_regions[FLASH_MAX_REGIONS];
-} flash_t;
-
-typedef enum {
- FLASH_UNLOCKED = 0,
- FLASH_LOCKED,
- FLASH_LOCKED_DOWN
-} flash_lock_t;
-
-int flash_init(flash_t *flash, void *base_addr);
-
-flash_lock_t flash_block_getlock(flash_t *flash, uint32_t block_offset);
-
-int flash_block_unlock(flash_t *flash, uint32_t block_offset);
-int flash_block_lock(flash_t *flash, uint32_t block_offset);
-int flash_block_lockdown(flash_t *flash, uint32_t block_offset);
-
-int flash_block_erase(flash_t *flash, uint32_t block_offset);
-
-int flash_program(flash_t *flash, uint32_t dst_offset, void *src, uint32_t nbytes);
-
-#endif
diff --git a/Src/osmoconbb/src/target/firmware/include/i2c.h b/Src/osmoconbb/src/target/firmware/include/i2c.h
deleted file mode 100644
index 37097a8..0000000
--- a/Src/osmoconbb/src/target/firmware/include/i2c.h
+++ /dev/null
@@ -1,7 +0,0 @@
-#ifndef _I2C_H
-#define _I2C_H
-
-int i2c_write(uint8_t chip, uint32_t addr, int alen, const uint8_t *buffer, int len);
-void i2c_init(int speed, int slaveadd);
-
-#endif /* I2C_H */
diff --git a/Src/osmoconbb/src/target/firmware/include/keypad.h b/Src/osmoconbb/src/target/firmware/include/keypad.h
deleted file mode 100644
index e2e6519..0000000
--- a/Src/osmoconbb/src/target/firmware/include/keypad.h
+++ /dev/null
@@ -1,66 +0,0 @@
-#ifndef _KEYPAD_H
-#define _KEYPAD_H
-
-enum buttons {
- BTN_0 = 0x00002000,
- BTN_1 = 0x00008000,
- BTN_2 = 0x00000400,
- BTN_3 = 0x00000020,
- BTN_4 = 0x00010000,
- BTN_5 = 0x00000800,
- BTN_6 = 0x00000040,
- BTN_7 = 0x00020000,
- BTN_8 = 0x00001000,
- BTN_9 = 0x00000080,
- BTN_STAR = 0x00040000,
- BTN_HASH = 0x00000100,
- BTN_MENU = 0x00004000,
- BTN_LEFT_SB = 0x00080000,
- BTN_RIGHT_SB = 0x00000200,
- BTN_UP = 0x00000002,
- BTN_DOWN = 0x00000004,
- BTN_LEFT = 0x00000008,
- BTN_RIGHT = 0x00000010,
- BTN_OK = 0x00000001,
- BTN_POWER = 0x01000000,
-};
-
-enum key_codes {
- KEY_0 = 0,
- KEY_1,
- KEY_2,
- KEY_3,
- KEY_4,
- KEY_5,
- KEY_6,
- KEY_7,
- KEY_8,
- KEY_9,
- KEY_STAR, //*
- KEY_HASH, //#
- KEY_MENU, //center of directional keys
- KEY_LEFT_SB, //softbutton
- KEY_RIGHT_SB, //softbutton
- KEY_UP,
- KEY_DOWN,
- KEY_LEFT,
- KEY_RIGHT,
- KEY_OK, //green off-hook
- KEY_POWER, //red on-hook
- KEY_INV = 0xFF
-};
-
-enum key_states {
- PRESSED,
- RELEASED,
-};
-
-void keypad_init(uint8_t interrupts);
-
-void keypad_poll();
-
-typedef void (*key_handler_t)(enum key_codes code, enum key_states state);
-
-void keypad_set_handler(key_handler_t handler);
-
-#endif /* KEYPAD_H */
diff --git a/Src/osmoconbb/src/target/firmware/include/layer1/afc.h b/Src/osmoconbb/src/target/firmware/include/layer1/afc.h
deleted file mode 100644
index 8b43f8a..0000000
--- a/Src/osmoconbb/src/target/firmware/include/layer1/afc.h
+++ /dev/null
@@ -1,18 +0,0 @@
-#ifndef _L1_AFC_H
-#define _L1_AFC_H
-
-#define AFC_SNR_THRESHOLD 2560 /* 2.5 dB in fx6.10 */
-
-/* Input a frequency error sample into the AFC averaging */
-void afc_input(int32_t freq_error, uint16_t arfcn, int valid);
-
-/* Update the AFC with a frequency error, bypassing averaging */
-void afc_correct(int16_t freq_error, uint16_t arfcn);
-
-/* Update DSP with new AFC DAC value to be used for next TDMA frame */
-void afc_load_dsp(void);
-
-/* Reset the AFC to its initial DAC value */
-void afc_reset(void);
-
-#endif
diff --git a/Src/osmoconbb/src/target/firmware/include/layer1/agc.h b/Src/osmoconbb/src/target/firmware/include/layer1/agc.h
deleted file mode 100644
index 2b7e46e..0000000
--- a/Src/osmoconbb/src/target/firmware/include/layer1/agc.h
+++ /dev/null
@@ -1,7 +0,0 @@
-#ifndef _L1_AGC_H
-#define _L1_AGC_H
-
-#define to_dbm8(x) ((x)*8)
-int16_t agc_inp_dbm8_by_pm(int16_t pm);
-
-#endif /* _L1_AGC_H */
diff --git a/Src/osmoconbb/src/target/firmware/include/layer1/apc.h b/Src/osmoconbb/src/target/firmware/include/layer1/apc.h
deleted file mode 100644
index 3d73c23..0000000
--- a/Src/osmoconbb/src/target/firmware/include/layer1/apc.h
+++ /dev/null
@@ -1,10 +0,0 @@
-#ifndef _L1_APC_H
-#define _L1_APC_H
-
-/* determine the AUXAPC value by the Tx Power Level */
-int16_t apc_tx_dbm2auxapc(enum gsm_band band, int8_t dbm);
-
-/* determine the AUXAPC value by the Tx Power Level */
-int16_t apc_tx_pwrlvl2auxapc(enum gsm_band band, uint8_t lvl);
-
-#endif
diff --git a/Src/osmoconbb/src/target/firmware/include/layer1/async.h b/Src/osmoconbb/src/target/firmware/include/layer1/async.h
deleted file mode 100644
index a9fa08d..0000000
--- a/Src/osmoconbb/src/target/firmware/include/layer1/async.h
+++ /dev/null
@@ -1,59 +0,0 @@
-#ifndef _L1_ASYNC_H
-#define _L1_ASYNC_H
-
-#include <osmocom/core/msgb.h>
-
-#include <layer1/mframe_sched.h>
-
-#if 0
-NOTE: Re-enabling interrupts causes an IRQ while processing the same IRQ.
- Use local_firq_save and local_irq_restore instead!
-
-/* When altering data structures used by L1 Sync part, we need to
- * make sure to temporarily disable IRQ/FIQ to keep data consistent */
-static inline void l1a_lock_sync(void)
-{
- arm_disable_interrupts();
-}
-
-static inline void l1a_unlock_sync(void)
-{
- arm_enable_interrupts();
-}
-#endif
-
-/* safely enable a message into the L1S TX queue */
-void l1a_txq_msgb_enq(struct llist_head *queue, struct msgb *msg);
-void l1a_meas_msgb_set(struct msgb *msg);
-
-/* safely count messages in the L1S TX queue */
-int l1a_txq_msgb_count(struct llist_head *queue);
-
-/* flush all pending msgb */
-void l1a_txq_msgb_flush(struct llist_head *queue);
-
-/* request a RACH */
-void l1a_rach_req(uint16_t offset, uint8_t combined, uint8_t ra);
-
-/* schedule frequency change */
-void l1a_freq_req(uint32_t fn_sched);
-
-/* Enable a repeating multiframe task */
-void l1a_mftask_enable(enum mframe_task task);
-
-/* Disable a repeating multiframe task */
-void l1a_mftask_disable(enum mframe_task task);
-
-/* Set TCH mode */
-uint8_t l1a_tch_mode_set(uint8_t mode);
-
-/* Set Audio routing mode */
-uint8_t l1a_audio_mode_set(uint8_t mode);
-
-/* Execute pending L1A completions */
-void l1a_compl_execute(void);
-
-/* Initialize asynchronous part of Layer1 */
-void l1a_init(void);
-
-#endif
diff --git a/Src/osmoconbb/src/target/firmware/include/layer1/avg.h b/Src/osmoconbb/src/target/firmware/include/layer1/avg.h
deleted file mode 100644
index 6c5de17..0000000
--- a/Src/osmoconbb/src/target/firmware/include/layer1/avg.h
+++ /dev/null
@@ -1,23 +0,0 @@
-#ifndef _L1_AVG_H
-#define _L1_AVG_H
-
-struct running_avg {
- /* configuration */
- uint16_t period; /* over how many samples to average */
- uint16_t min_valid;
-
- int32_t acc_val;
- uint16_t num_samples; /* how often did we try to sample? */
- uint16_t num_samples_valid; /* how often did we receive valid samples? */
-
- void (*outfn)(struct running_avg *, int32_t avg);
- void *priv;
-};
-
-/* input a new sample into the averaging process */
-void runavg_input(struct running_avg *ravg, int32_t val, int valid);
-
-/* check if sufficient samples have been obtained, and call outfn() */
-int runavg_check_output(struct running_avg *ravg);
-
-#endif /* _AVG_H */
diff --git a/Src/osmoconbb/src/target/firmware/include/layer1/l23_api.h b/Src/osmoconbb/src/target/firmware/include/layer1/l23_api.h
deleted file mode 100644
index 9b10b62..0000000
--- a/Src/osmoconbb/src/target/firmware/include/layer1/l23_api.h
+++ /dev/null
@@ -1,15 +0,0 @@
-#ifndef _L1_L23_API_H
-#define _L1_L23_API_H
-
-#include <stdint.h>
-#include <osmocom/core/msgb.h>
-#include <l1ctl_proto.h>
-
-void l1a_l23api_init(void);
-void l1_queue_for_l2(struct msgb *msg);
-struct msgb *l1ctl_msgb_alloc(uint8_t msg_type);
-struct msgb *l1_create_l2_msg(int msg_type, uint32_t fn, uint16_t snr, uint16_t arfcn);
-
-void l1ctl_tx_reset(uint8_t msg_type, uint8_t reset_type);
-
-#endif /* _L1_L23_API_H */
diff --git a/Src/osmoconbb/src/target/firmware/include/layer1/mframe_sched.h b/Src/osmoconbb/src/target/firmware/include/layer1/mframe_sched.h
deleted file mode 100644
index 3b2039a..0000000
--- a/Src/osmoconbb/src/target/firmware/include/layer1/mframe_sched.h
+++ /dev/null
@@ -1,67 +0,0 @@
-#ifndef _L1_MFRAME_SCHED_H
-#define _L1_MFRAME_SCHED_H
-
-#include <stdint.h>
-
-enum mframe_task {
- MF_TASK_BCCH_NORM,
- MF_TASK_BCCH_EXT,
- MF_TASK_CCCH,
- MF_TASK_CCCH_COMB,
-
- MF_TASK_SDCCH4_0,
- MF_TASK_SDCCH4_1,
- MF_TASK_SDCCH4_2,
- MF_TASK_SDCCH4_3,
-
- MF_TASK_SDCCH8_0,
- MF_TASK_SDCCH8_1,
- MF_TASK_SDCCH8_2,
- MF_TASK_SDCCH8_3,
- MF_TASK_SDCCH8_4,
- MF_TASK_SDCCH8_5,
- MF_TASK_SDCCH8_6,
- MF_TASK_SDCCH8_7,
-
- MF_TASK_TCH_F_EVEN,
- MF_TASK_TCH_F_ODD,
- MF_TASK_TCH_H_0,
- MF_TASK_TCH_H_1,
-
- MF_TASK_NEIGH_PM51,
- MF_TASK_NEIGH_PM26E,
- MF_TASK_NEIGH_PM26O,
-
- /* Test task: send Normal Burst in all timeslots */
- MF_TASK_UL_ALL_NB,
-};
-
-enum mf_sched_item_flag {
- MF_F_SACCH = (1 << 0),
-};
-
-/* The scheduler itself */
-struct mframe_scheduler {
- uint32_t tasks;
- uint32_t tasks_tgt;
- uint32_t safe_fn;
-};
-
-uint8_t mframe_task2chan_nr(enum mframe_task mft, uint8_t ts);
-
-/* Enable a specific task */
-void mframe_enable(enum mframe_task task_id);
-
-/* Disable a specific task */
-void mframe_disable(enum mframe_task task_id);
-
-/* Replace the current active set by the new one */
-void mframe_set(uint32_t tasks);
-
-/* Schedule mframe_sched_items according to current MF TASK list */
-void mframe_schedule(void);
-
-/* reset the scheduler, disabling all tasks */
-void mframe_reset(void);
-
-#endif /* _MFRAME_SCHED_H */
diff --git a/Src/osmoconbb/src/target/firmware/include/layer1/prim.h b/Src/osmoconbb/src/target/firmware/include/layer1/prim.h
deleted file mode 100644
index 30c51ae..0000000
--- a/Src/osmoconbb/src/target/firmware/include/layer1/prim.h
+++ /dev/null
@@ -1,34 +0,0 @@
-#ifndef _L1_PRIM_H
-#define _L1_PRIM_H
-
-#include <stdint.h>
-
-#include <layer1/tdma_sched.h>
-
-struct l1ctl_fbsb_req;
-
-/* Utils */
-const uint8_t *pu_get_idle_frame(void);
-void pu_update_rx_level(uint8_t rx_level);
-const uint8_t *pu_get_meas_frame(void);
-
-/* Primitives tests/requests */
-void l1s_fb_test(uint8_t base_fn, uint8_t fb_mode);
-void l1s_sb_test(uint8_t base_fn);
-void l1s_pm_test(uint8_t base_fn, uint16_t arfcn);
-void l1s_nb_test(uint8_t base_fn);
-
-void l1s_fbsb_req(uint8_t base_fn, struct l1ctl_fbsb_req *req);
-void l1a_freq_req(uint32_t fn_sched);
-void l1a_rach_req(uint16_t offset, uint8_t combined, uint8_t ra);
-
-/* Primitives raw scheduling sets */
-extern const struct tdma_sched_item nb_sched_set[];
-extern const struct tdma_sched_item nb_sched_set_ul[];
-
-extern const struct tdma_sched_item tch_sched_set[];
-extern const struct tdma_sched_item tch_a_sched_set[];
-extern const struct tdma_sched_item tch_d_sched_set[];
-extern const struct tdma_sched_item neigh_pm_sched_set[];
-
-#endif /* _L1_PRIM_H */
diff --git a/Src/osmoconbb/src/target/firmware/include/layer1/rfch.h b/Src/osmoconbb/src/target/firmware/include/layer1/rfch.h
deleted file mode 100644
index 344523c..0000000
--- a/Src/osmoconbb/src/target/firmware/include/layer1/rfch.h
+++ /dev/null
@@ -1,9 +0,0 @@
-#ifndef _L1_RFCH_H
-#define _L1_RFCH_H
-
-struct gsm_time;
-
-void rfch_get_params(struct gsm_time *t,
- uint16_t *arfcn_p, uint8_t *tsc_p, uint8_t *tn_p);
-
-#endif /* _L1_RFCH_H */
diff --git a/Src/osmoconbb/src/target/firmware/include/layer1/sched_gsmtime.h b/Src/osmoconbb/src/target/firmware/include/layer1/sched_gsmtime.h
deleted file mode 100644
index c40359e..0000000
--- a/Src/osmoconbb/src/target/firmware/include/layer1/sched_gsmtime.h
+++ /dev/null
@@ -1,24 +0,0 @@
-#ifndef _L1_SCHED_GSMTIME_H
-#define _L1_SCHED_GSMTIME_H
-
-#include <stdint.h>
-#include <osmocom/core/linuxlist.h>
-
-struct sched_gsmtime_event {
- struct llist_head list;
- const struct tdma_sched_item *si;
- uint32_t fn;
- uint16_t p3; /* parameter for TDMA scheduler */
-};
-
-/* initialize the GSMTIME scheduler */
-void sched_gsmtime_init(void);
-
-/* Scheduling of a single event at a givnen GSM time */
-int sched_gsmtime(const struct tdma_sched_item *si, uint32_t fn, uint16_t p3);
-
-/* execute all GSMTIME one-shot events pending for 'current_fn' */
-int sched_gsmtime_execute(uint32_t current_fn);
-
-void sched_gsmtime_reset(void);
-#endif
diff --git a/Src/osmoconbb/src/target/firmware/include/layer1/sync.h b/Src/osmoconbb/src/target/firmware/include/layer1/sync.h
deleted file mode 100644
index aa03c82..0000000
--- a/Src/osmoconbb/src/target/firmware/include/layer1/sync.h
+++ /dev/null
@@ -1,203 +0,0 @@
-#ifndef _L1_SYNC_H
-#define _L1_SYNC_H
-
-#include <osmocom/core/linuxlist.h>
-#include <osmocom/gsm/gsm_utils.h>
-#include <layer1/tdma_sched.h>
-#include <layer1/mframe_sched.h>
-#include <l1ctl_proto.h>
-
-/* structure representing L1 sync information about a cell */
-struct l1_cell_info {
- /* on which ARFCN (+band) is the cell? */
- uint16_t arfcn;
- /* what's the BSIC of the cell (from SCH burst decoding) */
- uint8_t bsic;
- /* Combined or non-combined CCCH */
- uint8_t ccch_mode; /* enum ccch_mode */
- /* whats the delta of the cells current GSM frame number
- * compared to our current local frame number */
- int32_t fn_offset;
- /* how much does the TPU need adjustment (delta) to synchronize
- * with the cells burst */
- uint32_t time_alignment;
- /* FIXME: should we also store the AFC value? */
-};
-
-enum l1s_chan {
- L1S_CHAN_MAIN,
- L1S_CHAN_SACCH,
- L1S_CHAN_TRAFFIC,
- _NUM_L1S_CHAN
-};
-
-enum l1_compl {
- L1_COMPL_FB,
- L1_COMPL_RACH,
- L1_COMPL_TX_NB,
- L1_COMPL_TX_TCH,
-};
-
-typedef void l1_compl_cb(enum l1_compl c);
-
-#define L1S_NUM_COMPL 32
-#define L1S_NUM_NEIGH_CELL 6
-
-struct l1s_h0 {
- uint16_t arfcn;
-};
-
-struct l1s_h1 {
- uint8_t hsn;
- uint8_t maio;
- uint8_t n;
- uint16_t ma[64];
-};
-
-struct l1s_state {
- struct gsm_time current_time; /* current GSM time */
- struct gsm_time next_time; /* GSM time at next TMDMA irq */
-
- /* the cell on which we are camping right now */
- struct l1_cell_info serving_cell;
-
- /* neighbor cell sync info */
- struct l1_cell_info neigh_cell[L1S_NUM_NEIGH_CELL];
-
- /* TDMA scheduler */
- struct tdma_scheduler tdma_sched;
-
- /* Multiframe scheduler */
- struct mframe_scheduler mframe_sched;
-
- /* The current TPU offset register */
- uint32_t tpu_offset;
- int32_t tpu_offset_correction;
-
- /* TX parameters */
- int8_t ta;
- uint8_t tx_power;
-
- /* TCH */
- uint8_t tch_mode;
- uint8_t tch_sync;
- uint8_t audio_mode;
-
- /* Transmit queues of pending packets for main DCCH and ACCH */
- struct llist_head tx_queue[_NUM_L1S_CHAN];
- struct msgb *tx_meas;
-
- /* Which L1A completions are scheduled right now */
- uint32_t scheduled_compl;
- /* callbacks for each of the completions */
- l1_compl_cb *completion[L1S_NUM_COMPL];
-
- /* Structures below are for L1-task specific parameters, used
- * to communicate between l1-sync and l1-async (l23_api) */
- struct {
- uint8_t mode; /* FB_MODE 0/1 */
- } fb;
-
- struct {
- /* power measurement l1 task */
- unsigned int mode;
- union {
- struct {
- uint16_t arfcn_start;
- uint16_t arfcn_next;
- uint16_t arfcn_end;
- } range;
- };
- struct msgb *msg;
- } pm;
-
- struct {
- uint8_t ra;
- } rach;
-
- struct {
- enum {
- GSM_DCHAN_NONE = 0,
- GSM_DCHAN_SDCCH_4,
- GSM_DCHAN_SDCCH_8,
- GSM_DCHAN_TCH_H,
- GSM_DCHAN_TCH_F,
- GSM_DCHAN_UNKNOWN,
- } type;
-
- uint8_t scn;
- uint8_t tsc;
- uint8_t tn;
- uint8_t h;
-
- union {
- struct l1s_h0 h0;
- struct l1s_h1 h1;
- };
-
- uint8_t st_tsc;
- uint8_t st_tn;
- uint8_t st_h;
-
- union {
- struct l1s_h0 st_h0;
- struct l1s_h1 st_h1;
- };
- } dedicated;
-
- /* neighbour cell power measurement process */
- struct {
- uint8_t n, second;
- uint8_t pos;
- uint8_t running;
- uint16_t band_arfcn[64];
- uint8_t level[64];
- } neigh_pm;
-};
-
-extern struct l1s_state l1s;
-
-struct l1s_meas_hdr {
- uint16_t snr; /* signal/noise ratio */
- int16_t toa_qbit; /* time of arrival (qbits) */
- int16_t pm_dbm8; /* power level in dbm/8 */
- int16_t freq_err; /* Frequency error in Hz */
-};
-
-int16_t l1s_snr_int(uint16_t snr);
-uint16_t l1s_snr_fract(uint16_t snr);
-
-void l1s_dsp_abort(void);
-
-void l1s_tx_apc_helper(uint16_t arfcn);
-
-/* schedule a completion */
-void l1s_compl_sched(enum l1_compl c);
-
-void l1s_init(void);
-
-/* reset the layer1 as part of synchronizing to a new cell */
-void l1s_reset(void);
-
-/* init.c */
-void layer1_init(void);
-
-/* A debug macro to print every TDMA frame */
-#ifdef DEBUG_EVERY_TDMA
-#define putchart(x) putchar(x)
-#else
-#define putchart(x)
-#endif
-
-/* Convert an angle in fx1.15 notatinon into Hz */
-#define BITFREQ_DIV_2PI 43104 /* 270kHz / 2 * pi */
-#define BITFREQ_DIV_PI 86208 /* 270kHz / pi */
-#define ANG2FREQ_SCALING (2<<15) /* 2^15 scaling factor for fx1.15 */
-#define ANGLE_TO_FREQ(angle) ((int16_t)angle * BITFREQ_DIV_PI / ANG2FREQ_SCALING)
-
-void l1s_reset_hw(void);
-void synchronize_tdma(struct l1_cell_info *cinfo);
-void l1s_time_inc(struct gsm_time *time, uint32_t delta_fn);
-void l1s_time_dump(const struct gsm_time *time);
-
-#endif /* _L1_SYNC_H */
diff --git a/Src/osmoconbb/src/target/firmware/include/layer1/tdma_sched.h b/Src/osmoconbb/src/target/firmware/include/layer1/tdma_sched.h
deleted file mode 100644
index f58d59b..0000000
--- a/Src/osmoconbb/src/target/firmware/include/layer1/tdma_sched.h
+++ /dev/null
@@ -1,73 +0,0 @@
-#ifndef _L1_TDMA_SCHED_H
-#define _L1_TDMA_SCHED_H
-
-#include <stdint.h>
-
-/* TDMA scheduler */
-
-/* The idea of this scheduler is that we have a circular buffer of buckets,
- * where each bucket corresponds to one future TDMA frame [interrupt]. Each
- * bucket contains of a list of callbacks which are executed when the bucket
- * index reaches that particular bucket. */
-
-#define TDMASCHED_NUM_FRAMES 25
-#define TDMASCHED_NUM_CB 8
-
-#define TDMA_IFLG_TPU (1<<0)
-#define TDMA_IFLG_DSP (1<<1)
-
-typedef int tdma_sched_cb(uint8_t p1, uint8_t p2, uint16_t p3);
-
-/* A single item in a TDMA scheduler bucket */
-struct tdma_sched_item {
- tdma_sched_cb *cb;
- uint8_t p1;
- uint8_t p2;
- uint16_t p3;
- int16_t prio;
- uint16_t flags; /* TDMA_IFLG_xxx */
-};
-
-/* A bucket inside the TDMA scheduler */
-struct tdma_sched_bucket {
- struct tdma_sched_item item[TDMASCHED_NUM_CB];
- uint8_t num_items;
-};
-
-/* The scheduler itself, consisting of buckets and a current index */
-struct tdma_scheduler {
- struct tdma_sched_bucket bucket[TDMASCHED_NUM_FRAMES];
- uint8_t cur_bucket;
-};
-
-/* Schedule an item at 'frame_offset' TDMA frames in the future */
-int tdma_schedule(uint8_t frame_offset, tdma_sched_cb *cb,
- uint8_t p1, uint8_t p2, uint16_t p3, int16_t prio);
-
-/* Schedule a set of items starting from 'frame_offset' TDMA frames in the future */
-int tdma_schedule_set(uint8_t frame_offset, const struct tdma_sched_item *item_set, uint16_t p3);
-
-/* Scan current frame scheduled items for flags */
-uint16_t tdma_sched_flag_scan(void);
-
-/* Execute pre-scheduled events for current frame */
-int tdma_sched_execute(void);
-
-/* Advance TDMA scheduler to the next bucket */
-void tdma_sched_advance(void);
-
-/* reset the scheduler; erase all scheduled items */
-void tdma_sched_reset(void);
-
-/* debug function: print number of entries of all TDMA buckets */
-void tdma_sched_dump(void);
-
-
-extern int tdma_end_set(uint8_t p1, uint8_t p2, uint16_t p3);
-#define SCHED_ITEM(x, p, y, z) { .cb = x, .p1 = y, .p2 = z, .prio = p, .flags = 0 }
-#define SCHED_ITEM_DT(x, p, y, z) { .cb = x, .p1 = y, .p2 = z, .prio = p, \
- .flags = TDMA_IFLG_TPU | TDMA_IFLG_DSP }
-#define SCHED_END_FRAME() { .cb = NULL, .p1 = 0, .p2 = 0 }
-#define SCHED_END_SET() { .cb = &tdma_end_set, .p1 = 0, .p2 = 0 }
-
-#endif /* _L1_TDMA_SCHED_H */
diff --git a/Src/osmoconbb/src/target/firmware/include/layer1/toa.h b/Src/osmoconbb/src/target/firmware/include/layer1/toa.h
deleted file mode 100644
index dea9dd9..0000000
--- a/Src/osmoconbb/src/target/firmware/include/layer1/toa.h
+++ /dev/null
@@ -1,10 +0,0 @@
-#ifndef _L1_TOA_H
-#define _L1_TOA_H
-
-/* Input a qbits error sample into the TOA averaging */
-void toa_input(int32_t offset, uint32_t snr);
-
-/* Reset the TOA counters */
-void toa_reset(void);
-
-#endif
diff --git a/Src/osmoconbb/src/target/firmware/include/layer1/tpu_window.h b/Src/osmoconbb/src/target/firmware/include/layer1/tpu_window.h
deleted file mode 100644
index 7b146f1..0000000
--- a/Src/osmoconbb/src/target/firmware/include/layer1/tpu_window.h
+++ /dev/null
@@ -1,24 +0,0 @@
-#ifndef _L1_TPU_CTRL_H
-#define _L1_TPU_CTRL_H
-
-enum l1_rxwin_type {
- L1_RXWIN_PW, /* power measurement */
- L1_RXWIN_FB, /* FCCH burst detection */
- L1_RXWIN_SB, /* SCH burst detection */
- L1_RXWIN_NB, /* Normal burst decoding */
- _NUM_L1_RXWIN
-};
-
-enum l1_txwin_type {
- L1_TXWIN_NB, /* Normal burst sending */
- L1_TXWIN_AB, /* RACH burst sending */
- _NUM_L1_TXWIN
-};
-
-void l1s_win_init(void);
-void l1s_rx_win_ctrl(uint16_t arfcn, enum l1_rxwin_type wtype, uint8_t tn_ofs);
-void l1s_tx_win_ctrl(uint16_t arfcn, enum l1_txwin_type wtype, uint8_t pwr, uint8_t tn_ofs);
-
-void tpu_end_scenario(void);
-
-#endif /* _L1_TPU_CTRL_H */
diff --git a/Src/osmoconbb/src/target/firmware/include/manifest.h b/Src/osmoconbb/src/target/firmware/include/manifest.h
deleted file mode 100644
index 6c1b202..0000000
--- a/Src/osmoconbb/src/target/firmware/include/manifest.h
+++ /dev/null
@@ -1,10 +0,0 @@
-
-#ifndef _MANIFEST_H
-#define _MANIFEST_H
-
-extern const char *manifest_application;
-extern const char *manifest_revision;
-extern const char *manifest_board;
-extern const char *manifest_environment;
-
-#endif /* !_MANIFEST_H */
diff --git a/Src/osmoconbb/src/target/firmware/include/memory.h b/Src/osmoconbb/src/target/firmware/include/memory.h
deleted file mode 100644
index b0a0490..0000000
--- a/Src/osmoconbb/src/target/firmware/include/memory.h
+++ /dev/null
@@ -1,28 +0,0 @@
-#ifndef _MEMORY_H
-#define _MEMORY_H
-
-#define __arch_getb(a) (*(volatile unsigned char *)(a))
-#define __arch_getw(a) (*(volatile unsigned short *)(a))
-#define __arch_getl(a) (*(volatile unsigned int *)(a))
-
-#define __arch_putb(v,a) (*(volatile unsigned char *)(a) = (v))
-#define __arch_putw(v,a) (*(volatile unsigned short *)(a) = (v))
-#define __arch_putl(v,a) (*(volatile unsigned int *)(a) = (v))
-
-#define __raw_writeb(v,a) __arch_putb(v,a)
-#define __raw_writew(v,a) __arch_putw(v,a)
-#define __raw_writel(v,a) __arch_putl(v,a)
-
-#define __raw_readb(a) __arch_getb(a)
-#define __raw_readw(a) __arch_getw(a)
-#define __raw_readl(a) __arch_getl(a)
-
-#define writeb(v,a) __arch_putb(v,a)
-#define writew(v,a) __arch_putw(v,a)
-#define writel(v,a) __arch_putl(v,a)
-
-#define readb(a) __arch_getb(a)
-#define readw(a) __arch_getw(a)
-#define readl(a) __arch_getl(a)
-
-#endif /* _MEMORY_H */
diff --git a/Src/osmoconbb/src/target/firmware/include/mtk/bfe.h b/Src/osmoconbb/src/target/firmware/include/mtk/bfe.h
deleted file mode 100644
index b07f620..0000000
--- a/Src/osmoconbb/src/target/firmware/include/mtk/bfe.h
+++ /dev/null
@@ -1,107 +0,0 @@
-#ifndef _MTK_BFE_H
-#define _MTK_BFE_H
-
-/* MTK Baseband Frontend */
-
-/* MT6235 Chapter 10 */
-
-enum mtk_bfe_reg {
- BFE_CON = 0x0000,
- BFE_STA = 0x0004,
- /* Rx Configuration Register */
- RX_CFG = 0x0010,
- /* Rx Control Register */
- RX_CON = 0x0014,
- /* RX Interference Detection Power Measurement Control Register */
- RX_PM_CON = 0x0018,
- /* RX FIR Coefficient Set ID Control Register */
- RX_FIR_CSID_CON = 0x001c,
- /* RX Ram0 Coefficient Set 0 Register */
- RX_RAM0_CS0 = 0x0070,
- /* RX Ram1 Coefficient Set 0 Register */
- RX_RAM1_CS0 = 0x0020,
- /* Rx Interference Detection HPF Power Register */
- RX_HPWR_STS = 0x00b0,
- /* Rx Interference Detection BPF Power Register */
- RX_BPWR_STS = 0x00b4,
-
- TX_CFG = 0x0060,
- TX_CON = 0x0064,
- TX_OFF = 0x0068,
-};
-
-#define RX_RAM0_CS(n) (RX_RAM0_CS0 + (n)*4)
-#define RX_RAM1_CS(n) (RX_RAM0_CS1 + (n)*4)
-
-/* SWAP I/Q before input to baesband frontend */
-#define RX_CFG_SWAP_IQ 0x0001
-/* Bypass RX FIR filter control */
-#define RX_CFG_BYPFLTR 0x0002
-/* Number of RX FIR filter taps */
-#define RX_CFG_FIRTPNO(n) (((n) & 0x3f) << 4)
-
-#define RX_CON_BLPEN_NORMAL (0 << 0)
-#define RX_CON_BLPEN_LOOPB (1 << 0)
-#define RX_CON_BLPEN_LOOPB_FILT (2 << 0)
-
-/* Phase de-rotation in wide FIR data path */
-#define RX_CON_PH_ROEN_W (1 << 2)
-/* Phase de-rotation in narrow FIR data path */
-#define RX_CON_PH_ROEN_N (1 << 3)
-/* RX I-data gain compenstation select (+/- 1.5dB */
-#define RX_CON_IGAINSEL_00dB (0 << 4)
-#define RX_CON_IGAINSEL_03dB (1 << 4)
-#define RX_CON_IGAINSEL_06dB (2 << 4)
-#define RX_CON_IGAINSEL_09dB (3 << 4)
-#define RX_CON_IGAINSEL_12dB (4 << 4)
-#define RX_CON_IGAINSEL_15dB (5 << 4)
-#define RX_CON_IGAINSEL_n03dB (9 << 4)
-#define RX_CON_IGAINSEL_n06dB (10 << 4)
-#define RX_CON_IGAINSEL_n09dB (11 << 4)
-#define RX_CON_IGAINSEL_n12dB (12 << 4)
-#define RX_CON_IGAINSEL_n15dB (13 << 4)
-
-/* TX_CFG */
-/* Appending Bits enable */
-#define TX_CFG_APNDEN (1 << 0)
-/* Ramp Profile Select for 8PSK */
-#define TX_CFG_RPSEL_I (0 << 1) /* 50 kHz sine tone */
-#define TX_CFG_RPSEL_II (1 << 1) /* null DC I/Q */
-#define TX_CFG_RPSEL_III (3 << 1)
-#define TX_CFG_INTEN (1 << 3) /* Interpolate between bursts */
-#define TX_CFG_MDBYP (1 << 4) /* Modulator Bypass */
-#define TX_CFG_SGEN (1 << 5) /* 540 kHz sine tone */
-#define TX_CFG_ALL_10GEN_ZERO (1 << 6)
-#define TX_CFG_ALL_10GEN_ONE (2 << 6)
-#define TX_CFG_SW_QBCNT(n) (((n) & 0x1f) << 8)
-#define TX_CFG_GMSK_DTAP_SYM_1 (0 << 13)
-#define TX_CFG_GMSK_DTAP_SYM_0 (1 << 13)
-#define TX_CFG_GMSK_DTAP_SYM_2 (2 << 13)
-
-#define TX_CON_IQSWP (1 << 0) /* Swap I/Q */
-/* GMSK or 8PSK modulation for 1st through 4th burst */
-#define TX_CON_MDSEL1_8PSK (1 << 2)
-#define TX_CON_MDSEL2_8PSK (1 << 3)
-#define TX_CON_MDSEL3_8PSK (1 << 4)
-#define TX_CON_MDSEL4_8PSK (1 << 5)
-/* Quadratur phase compensation select */
-#define TX_CON_PHSEL_0deg (0 << 8)
-#define TX_CON_PHSEL_1deg (1 << 8)
-#define TX_CON_PHSEL_2deg (2 << 8)
-#define TX_CON_PHSEL_3deg (3 << 8)
-#define TX_CON_PHSEL_4deg (4 << 8)
-#define TX_CON_PHSEL_5deg (5 << 8)
-#define TX_CON_PHSEL_n5deg (10 << 8)
-#define TX_CON_PHSEL_n4deg (11 << 8)
-#define TX_CON_PHSEL_n3deg (12 << 8)
-#define TX_CON_PHSEL_n2deg (13 << 8)
-#define TX_CON_PHSEL_n1deg (14 << 8)
-/* GMSK modulator output latenct */
-#define TX_CON_GMSK_DTAP_QB(n) (((n) & 3) << 12)
-
-#define TX_OFF_I(n) (((n) & 0x3f) << 0)
-#define TX_OFF_Q(n) (((n) & 0x3f) << 8)
-/* Double Buffering */
-#define TX_OFF_TYP_DB 0x8000
-
-#endif /* _MTK_BFE_H */
diff --git a/Src/osmoconbb/src/target/firmware/include/mtk/bpi.h b/Src/osmoconbb/src/target/firmware/include/mtk/bpi.h
deleted file mode 100644
index 8aa8ee5..0000000
--- a/Src/osmoconbb/src/target/firmware/include/mtk/bpi.h
+++ /dev/null
@@ -1,20 +0,0 @@
-#ifndef _MTK_BPI_H
-#define _MTK_BPI_H
-
-/* MTK Baseband Parallel Interface */
-
-/* Chapter 9.2 of MT6235 Data Sheet */
-
-#define BPI_BUF(n) (BPI_BUF0 + ((n) * 4))
-
-#define MTK_BPI(n) (n)
-
-enum mtk_bpi_reg {
- BPI_CON = 0x0000,
- BPI_BUF0 = 0x0004,
- BPI_ENA0 = 0x00b0,
- BPI_ENA1 = 0x00b4,
- BPI_ENA2 = 0x00b8,
-};
-
-#endif /* _MTK_BPI_H */
diff --git a/Src/osmoconbb/src/target/firmware/include/mtk/bsi.h b/Src/osmoconbb/src/target/firmware/include/mtk/bsi.h
deleted file mode 100644
index 6f381ce..0000000
--- a/Src/osmoconbb/src/target/firmware/include/mtk/bsi.h
+++ /dev/null
@@ -1,41 +0,0 @@
-#ifndef _MTK_BSI_H
-#define _MTK_BSI_H
-
-/* MTK Baseband Serial Interface */
-
-enum bsi_reg {
- BSI_CON = 0x0000,
- BSI_D0_CON = 0x0004,
- BSI_D0_DAT = 0x0008,
-
- BSI_ENA_0 = 0x0190,
- BSI_ENA_1 = 0x0194,
- BSI_IO_CON = 0x0198,
- BSI_DOUT = 0x019c,
- BSI_DIN = 0x01a0,
- BSI_PAIR_NUM = 0x01a4,
-
-};
-
-/* Compute offset of BSI_D0_CON / BSI_D0_DAT registers */
-#define BSI_Dn_CON(x) (BSI_D0_CON + (x * 8))
-#define BSI_Dn_CON(x) (BSI_D0_DAT + (x * 8))
-
-/* MT6235 Section 9.1.1 */
-#define BSI_CON_CLK_POL_INV (1 << 0)
-#define BSI_CON_CLK_SPD_52_2 (0 << 1) /* 26 MHz */
-#define BSI_CON_CLK_SPD_52_4 (1 << 1) /* 13 MHz */
-#define BSI_CON_CLK_SPD_52_6 (2 << 1) /* 8.67 MHz */
-#define BSI_CON_CLK_SPD_52_8 (3 << 1) /* 6.50 MHz */
-#define BSI_CON_IMOD (1 << 3)
-#define BSI_CON_EN0_LEN_SHORT (1 << 4)
-#define BSI_CON_EN0_POL_INV (1 << 5)
-#define BSI_CON_EN0_LEN_SHORT (1 << 6)
-#define BSI_CON_EN0_POL_INV (1 << 7)
-#define BSI_CON_SETENV (1 << 8)
-
-/* how the length is encoded in BSI_Dx_CON */
-#define BSI_Dx_LEN(n) ((n & 0x7f) << 8)
-#define BSI_Dx_ISB 0x8000 /* select device 1 */
-
-#endif /* _MTK_BSI_H */
diff --git a/Src/osmoconbb/src/target/firmware/include/mtk/emi.h b/Src/osmoconbb/src/target/firmware/include/mtk/emi.h
deleted file mode 100644
index 1818499..0000000
--- a/Src/osmoconbb/src/target/firmware/include/mtk/emi.h
+++ /dev/null
@@ -1,42 +0,0 @@
-/*
- * (C) 2010 by Tieto <www.tieto.com>
- * Marcin Mielczarczyk <marcin.mielczarczyk@tieto.com>
- *
- * All Rights Reserved
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- */
-
-#ifndef __MTK_EMI_H_
-#define __MTK_EMI_H_
-
-/* External Memory Interface register definitions */
-#define MTK_EMI_CONA (MTK_EMI_BASE + 0x00)
-#define MTK_EMI_CONB (MTK_EMI_BASE + 0x08)
-#define MTK_EMI_CONC (MTK_EMI_BASE + 0x10)
-#define MTK_EMI_COND (MTK_EMI_BASE + 0x18)
-#define MTK_EMI_CONI (MTK_EMI_BASE + 0x40)
-#define MTK_EMI_CONJ (MTK_EMI_BASE + 0x48)
-#define MTK_EMI_CONK (MTK_EMI_BASE + 0x50)
-#define MTK_EMI_CONL (MTK_EMI_BASE + 0x58)
-#define MTK_EMI_CONM (MTK_EMI_BASE + 0x60)
-#define MTK_EMI_CONN (MTK_EMI_BASE + 0x68)
-#define MTK_EMI_GENA (MTK_EMI_BASE + 0x70)
-#define MTK_EMI_GENB (MTK_EMI_BASE + 0x78)
-#define MTK_EMI_GENC (MTK_EMI_BASE + 0x80)
-#define MTK_EMI_GEND (MTK_EMI_BASE + 0x88)
-
-#endif
diff --git a/Src/osmoconbb/src/target/firmware/include/mtk/mt6139.h b/Src/osmoconbb/src/target/firmware/include/mtk/mt6139.h
deleted file mode 100644
index 35458b5..0000000
--- a/Src/osmoconbb/src/target/firmware/include/mtk/mt6139.h
+++ /dev/null
@@ -1,60 +0,0 @@
-#ifndef _MTK_MT6139_H
-#define _MTK_MT6139_H
-
-enum mt6139_band {
- MTRF_BAND_GSM850 = 0,
- MTRF_BAND_GSM900 = 1,
- MTRF_BAND_GSM1800 = 2,
- MTRF_BAND_GSM1900 = 3,
-};
-
-#define MT6139_CW0_SYNCP_SHIFT 0
-#define MT6139_CW0_SYNCPW (1 << 2)
-#define MT6139_CW0_DIEN (1 << 3)
-#define MT6139_CW0_FLT (1 << 4)
-#define MT6139_CW0_AFC_SHIFT 5
-#define MT6139_CW0_VCO_SEL (1 << 11)
-#define MT6139_CW0_GPO (1 << 12)
-#define MT6139_CW0_POR (1 << 13)
-
-#define MT6139_CW1_NFRACT_SHIFT 0
-#define MT6139_CW1_NINT_SHIFT 8
-#define MT6139_CW1_BAND_SHIFT 16
-#define MT6139_CW1_TRX_850 (1 << 18)
-
-#define MT6139_CW2_GAINTBL_SHIFT 0
-#define MT6139_CW2_MODE_SHIFT 6
-#define MT6139_CW2_AUTO_CAL (1 << 9)
-#define MT6139_CW2_DCD_AQ_SHIFT 10
-#define MT6139_CW2_DCD_AI_SHIFT 16
-
-#define MT6139_CW9_DCD_CQ_SHIFT 0
-#define MT6139_CW9_DCD_BQ_SHIFT 7
-#define MT6139_CW9_PWR_DAC_C (1 << 14)
-#define MT6139_CW9_PWR_DAC_B (1 << 15)
-#define MT6139_CW9_PWR_DAC_A (1 << 16)
-#define MT6139_CW9_AM_ENABLE (1 << 17)
-
-enum mt6139_cw2_mode {
- MODE_SLEEP = 0x0,
- MODE_WARM_UP = 0x1,
- MODE_RECEIVE = 0x3,
- MODE_TRANSMIT = 0x4,
-};
-
-#define MT6139_CW11_TX_CTL (1 << 0)
-#define MT6139_CW11_TXG_IQM (1 << 1)
-#define MT6139_CW11_TXD_IQM (1 << 2)
-#define MT6139_CW11_TX_DIV2 (1 << 3)
-#define MT6139_CW11_TX_DIV4 (1 << 4)
-#define MT6139_CW11_TXG_BUF (1 << 5)
-#define MT6139_CW11_TXD_BUF (1 << 6)
-#define MT6139_CW11_TXMODGAIN_SHIFT 7
-#define MT6139_CW11_TX_FLT_SHIFT 10
-#define MT6139_CW11_TXAPC_SHIFT 14
-#define MT6139_CW11_TXPW_SHIFT 16
-#define MT6139_CW11_TXBIAST_SHIFT 18
-#define MT6139_CW11_TXDIV_GC0 (1 << 20)
-#define MT6139_CW11_TXDIV_GC1 (1 << 21)
-
-#endif /* _MTK_MT6139_H */
diff --git a/Src/osmoconbb/src/target/firmware/include/mtk/mt6235.h b/Src/osmoconbb/src/target/firmware/include/mtk/mt6235.h
deleted file mode 100644
index fb9d368..0000000
--- a/Src/osmoconbb/src/target/firmware/include/mtk/mt6235.h
+++ /dev/null
@@ -1,74 +0,0 @@
-/*
- * (C) 2010 by Tieto <www.tieto.com>
- * Marcin Mielczarczyk <marcin.mielczarczyk@tieto.com>
- *
- * All Rights Reserved
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- */
-
-#ifndef __MT6235_H
-#define __MT6235_H
-
-/* Peripheral base addresses */
-#define MTK_EFUSE_BASE 0x80000000
-#define MTK_CONFG_BASE 0x80010000
-#define MTK_GPIO_BASE 0x80020000
-#define MTK_RGU_BASE 0x80030000
-#define MTK_EMI_BASE 0x81000000
-#define MTK_CIRQ_BASE 0x81010000
-#define MTK_DMA_BASE 0x81020000
-#define MTK_UART1_BASE 0x81030000
-#define MTK_UART2_BASE 0x81040000
-#define MTK_UART3_BASE 0x81050000
-#define MTK_GPT_BASE 0x81060000
-#define MTK_KP_BASE 0x81080000
-#define MTK_PWM_BASE 0x81090000
-#define MTK_SIM_BASE 0x810A0000
-#define MTK_RTC_BASE 0x810C0000
-#define MTK_SEJ_BASE 0x810D0000
-#define MTK_BM_BASE 0x810E0000
-#define MTK_IRDA_BASE 0x810F0000
-#define MTK_I2C_BASE 0x81100000
-#define MTK_MSDC_BASE 0x81110000
-#define MTK_NFI_BASE 0x81120000
-#define MTK_MSSDC2_BASE 0x81140000
-#define MTK_TDMA_BASE 0x82000000
-#define MTK_BSI_BASE 0x82010000
-#define MTK_BPI_BASE 0x82020000
-#define MTK_AFC_BASE 0x82030000
-#define MTK_APC_BASE 0x82040000
-#define MTK_AUXADC_BASE 0x82050000
-#define MTK_DIVIDER_BASE 0x82060000
-#define MTK_FSC_BASE 0x82070000
-#define MTK_GCU_BASE 0x82080000
-#define MTK_CSD_ACC_BASE 0x82090000
-#define MTK_SHARE1_BASE 0x820A0000
-#define MTK_IRDBG1_BASE 0x820B0000
-#define MTK_SHARE2_BASE 0x820C0000
-#define MTK_IRDBG2_BASE 0x820D0000
-#define MTK_PATCH_BASE 0x820E0000
-#define MTK_AFE_BASE 0x820F0000
-#define MTK_BFE_BASE 0x82100000
-#define MTK_PLL_BASE 0x83000000
-#define MTK_ACIF_BASE 0x83010000
-#define MTK_GMC_BASE 0x84000000
-#define MTK_G2D_BASE 0x84010000
-#define MTK_GCMQ_BASE 0x84020000
-#define MTK_CAM_BASE 0x840B0000
-#define MTK_CRZ_BASE 0x840E0000
-
-#endif
diff --git a/Src/osmoconbb/src/target/firmware/include/mtk/mt6235_sciphone_g2.h b/Src/osmoconbb/src/target/firmware/include/mtk/mt6235_sciphone_g2.h
deleted file mode 100644
index 74d9e7b..0000000
--- a/Src/osmoconbb/src/target/firmware/include/mtk/mt6235_sciphone_g2.h
+++ /dev/null
@@ -1,38 +0,0 @@
-#ifndef _SCIPHONE_G2_H
-#define _SCIPHONE_G2_H
-/* Bluelans Sciphone G2 support */
-
-/* Use of the Baseband Parallel Interface by the G2 board */
-#define HB_TX MTK_BPI(0)
-#define PCS_RX MTK_BPI(1)
-#define LB_TX MTK_BPI(2)
-#define PA_EN MTK_BPI(4)
-#define BAND_SW MTK_BPI(5)
-#define MODE_PA MTK_BPI(7)
-#define RF_VCO_EN MTK_BPI(9)
-
-#define GPIO_GPS_PWR_EN MTK_GPIO(19)
-#define GPIO_WIFI_EN MTK_GPIO(20)
-#define GPIO_OP1_EN MTK_GPIO(22)
-#define GPIO_BT_PWR_EN MTK_GPIO(39)
-#define GPIO_BT_RST MTK_GPIO(62)
-#define GPIO_USB_CHR_ID MTK_GPIO(73)
-#define GPIO_FM_SCL MTK_GPIO(46)
-#define GPIO_FM_SDA MTK_GPIO(47)
-#define GPIO_GS_SCL MTK_GPIO(48)
-#define GPIO_GS_SDA MTK_GPIO(58)
-#define GPIO_GS_EN MTK_GPIO(26)
-
-#define GPIO_GPS_EINT MTK_GPIO(42)
-
-#define EINT_HEADSET MTK_EINT(0)
-#define EINT_BT MTK_EINT(1)
-#define EINT_GPS2GSM MTK_EINT(2)
-#define EINT_WIFI MTK_EINT(3)
-
-#define CLKM_BT_32k MTK_CLKM(2)
-#define CLKM_WIFI_32k MTK_CLKM(3)
-#define CLKM_FM_32k MTK_CLKM(4)
-
-
-#endif /* _SCIPHONE_G2_H */
diff --git a/Src/osmoconbb/src/target/firmware/include/mtk/system.h b/Src/osmoconbb/src/target/firmware/include/mtk/system.h
deleted file mode 100644
index 4543029..0000000
--- a/Src/osmoconbb/src/target/firmware/include/mtk/system.h
+++ /dev/null
@@ -1,195 +0,0 @@
-/*
- * (C) 2010 by Tieto <www.tieto.com>
- * Marcin Mielczarczyk <marcin.mielczarczyk@tieto.com>
- *
- * All Rights Reserved
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- */
-
-#ifndef __MTK_SYSTEM_H_
-#define __MTK_SYSTEM_H_
-
-/*
- * Configuration block section (Clock, Power Down, Version and Reset
- */
-
-/* Register definitions */
-#define MTK_CONFG_HW_VERSION (MTK_CONFG_BASE + 0x000)
-#define MTK_CONFG_FW_VERSION (MTK_CONFG_BASE + 0x004)
-#define MTK_CONFG_HW_CODE (MTK_CONFG_BASE + 0x008)
-#define MTK_CONFG_SLEEP_CON (MTK_CONFG_BASE + 0x114)
-#define MTK_CONFG_MCUCLK_CON (MTK_CONFG_BASE + 0x118)
-#define MTK_CONFG_DSPCLK_CON (MTK_CONFG_BASE + 0x11C)
-#define MTK_CONFG_IDN_SEL (MTK_CONFG_BASE + 0x200)
-#define MTK_CONFG_PDN_CON0 (MTK_CONFG_BASE + 0x300)
-#define MTK_CONFG_PDN_CON1 (MTK_CONFG_BASE + 0x304)
-#define MTK_CONFG_PDN_CON2 (MTK_CONFG_BASE + 0x308)
-#define MTK_CONFG_PDN_CON3 (MTK_CONFG_BASE + 0x30C)
-#define MTK_CONFG_PDN_SET0 (MTK_CONFG_BASE + 0x310)
-#define MTK_CONFG_PDN_SET1 (MTK_CONFG_BASE + 0x314)
-#define MTK_CONFG_PDN_SET2 (MTK_CONFG_BASE + 0x318)
-#define MTK_CONFG_PDN_SET3 (MTK_CONFG_BASE + 0x31C)
-#define MTK_CONFG_PDN_CLR0 (MTK_CONFG_BASE + 0x320)
-#define MTK_CONFG_PDN_CLR1 (MTK_CONFG_BASE + 0x324)
-#define MTK_CONFG_PDN_CLR2 (MTK_CONFG_BASE + 0x328)
-#define MTK_CONFG_PDN_CLR3 (MTK_CONFG_BASE + 0x32C)
-
-/* CONFG_MCUCLK_CON bit fields definitions */
-#define MCUCLK_CON_AHBX8CLK_SHIFT (0)
-#define MCUCLK_CON_AHBX4CLK_SHIFT (4)
-#define MCUCLK_CON_ARMCLK_SHIFT (8)
-#define MCUCLK_CON_EMICLK_SHIFT (12)
-
-/* PDN_CON0 bit fields definitions */
-#define PDN_CON0_CON0_DMA (1 << 0)
-#define PDN_CON0_USB (1 << 1)
-#define PDN_CON0_GCU (1 << 2)
-#define PDN_CON0_WAVE (1 << 3)
-#define PDN_CON0_SEJ (1 << 4)
-#define PDN_CON0_IR (1 << 6)
-#define PDN_CON0_PWM3 (1 << 7)
-#define PDN_CON0_PWM (1 << 8)
-#define PDN_CON0_SIM2 (1 << 10)
-#define PDN_CON0_IRDBG1 (1 << 12)
-#define PDN_CON0_IRDBG2 (1 << 13)
-
-/* PDN_CON1 bit fields definitions */
-#define PDN_CON1_GPT (1 << 0)
-#define PDN_CON1_KP (1 << 1)
-#define PDN_CON1_GPIO (1 << 2)
-#define PDN_CON1_UART1 (1 << 3)
-#define PDN_CON1_SIM (1 << 4)
-#define PDN_CON1_PWM1 (1 << 5)
-#define PDN_CON1_LCD (1 << 7)
-#define PDN_CON1_UART2 (1 << 8)
-#define PDN_CON1_MSDC (1 << 9)
-#define PDN_CON1_TP (1 << 10)
-#define PDN_CON1_PWM2 (1 << 11)
-#define PDN_CON1_NFI (1 << 12)
-#define PDN_CON1_UART3 (1 << 14)
-#define PDN_CON1_IRDA (1 << 15)
-
-/* PDN_CON2 bit fields definitions */
-#define PDN_CON2_TDMA (1 << 0)
-#define PDN_CON2_RTC (1 << 1)
-#define PDN_CON2_BSI (1 << 2)
-#define PDN_CON2_BPI (1 << 3)
-#define PDN_CON2_AFC (1 << 4)
-#define PDN_CON2_APC (1 << 5)
-
-/*
- * Reset Generation Unit block section
- */
-#define MTK_RGU_WDT_MODE (MTK_RGU_BASE + 0x00)
-#define MTK_RGU_WDT_LENGTH (MTK_RGU_BASE + 0x04)
-#define MTK_RGU_WDT_RESTART (MTK_RGU_BASE + 0x08)
-#define MTK_RGU_WDT_STA (MTK_RGU_BASE + 0x0C)
-#define MTK_RGU_SW_PERIPH_RSTN (MTK_RGU_BASE + 0x10)
-#define MTK_RGU_SW_DSP_RSTN (MTK_RGU_BASE + 0x14)
-#define MTK_RGU_WDT_RSTINTERVAL (MTK_RGU_BASE + 0x18)
-#define MTK_RGU_WDT_SWRST (MTK_RGU_BASE + 0x1C)
-
-#define WDT_MODE_KEY 0x2200
-#define WDT_LENGTH_KEY 0x0008
-#define WDT_RESTART_KEY 0x1971
-#define SW_PERIPH_RSTN_KEY 0x0037
-#define WDT_SWRST_KEY 0x1209
-
-/*
- * RTC block section
- */
-
-/* RTC registers definition */
-#define MTK_RTC_BBPU (MTK_RTC_BASE + 0x00)
-#define MTK_RTC_IRQ_STA (MTK_RTC_BASE + 0x04)
-#define MTK_RTC_IRQ_EN (MTK_RTC_BASE + 0x08)
-#define MTK_RTC_CII_EN (MTK_RTC_BASE + 0x0C)
-#define MTK_RTC_AL_MASK (MTK_RTC_BASE + 0x10)
-#define MTK_RTC_TC_SEC (MTK_RTC_BASE + 0x14)
-#define MTK_RTC_TC_MIN (MTK_RTC_BASE + 0x18)
-#define MTK_RTC_TC_HOU (MTK_RTC_BASE + 0x1C)
-#define MTK_RTC_TC_DOM (MTK_RTC_BASE + 0x20)
-#define MTK_RTC_TC_DOW (MTK_RTC_BASE + 0x24)
-#define MTK_RTC_TC_MTH (MTK_RTC_BASE + 0x28)
-#define MTK_RTC_TC_YEA (MTK_RTC_BASE + 0x2C)
-#define MTK_RTC_AL_SEC (MTK_RTC_BASE + 0x30)
-#define MTK_RTC_AL_MIN (MTK_RTC_BASE + 0x34)
-#define MTK_RTC_AL_HOU (MTK_RTC_BASE + 0x38)
-#define MTK_RTC_AL_DOM (MTK_RTC_BASE + 0x3C)
-#define MTK_RTC_AL_DOW (MTK_RTC_BASE + 0x40)
-#define MTK_RTC_AL_MTH (MTK_RTC_BASE + 0x44)
-#define MTK_RTC_AL_YEA (MTK_RTC_BASE + 0x48)
-#define MTK_RTC_XOSCCALI (MTK_RTC_BASE + 0x4C)
-#define MTK_RTC_POWERKEY1 (MTK_RTC_BASE + 0x50)
-#define MTK_RTC_POWERKEY2 (MTK_RTC_BASE + 0x54)
-#define MTK_RTC_PDN1 (MTK_RTC_BASE + 0x58)
-#define MTK_RTC_PDN2 (MTK_RTC_BASE + 0x5C)
-#define MTK_RTC_SPAR1 (MTK_RTC_BASE + 0x64)
-#define MTK_RTC_DIFF (MTK_RTC_BASE + 0x6C)
-#define MTK_RTC_CALI (MTK_RTC_BASE + 0x70)
-#define MTK_RTC_WRTGR (MTK_RTC_BASE + 0x74)
-
-#define POWERKEY1_MAGIC 0xA357
-#define POWERKEY2_MAGIC 0x67D2
-
-/* RTC_BBPU bit fields definitions */
-#define RTC_BBPU_PWREN (1 << 0)
-#define RTC_BBPU_WRITE_EN (1 << 1)
-#define RTC_BBPU_BBPU (1 << 2)
-#define RTC_BBPU_AUTO (1 << 3)
-#define RTC_BBPU_CLRPKY (1 << 4)
-#define RTC_BBPU_RELOAD (1 << 5)
-#define RTC_BBPU_CBUSY (1 << 6)
-#define RTC_BBPU_DBING (1 << 7)
-#define RTC_BBPU_KEY_BBPU (1 << 8)
-
-/* RTC_BBPU write is only acceptable when KEY_BBPU=0x43 */
-#define BBPU_MAGIC 0x4300
-
-/*
- * PLL block section
- */
-
-/* PLL registers definition */
-#define MTK_PLL_PLL (MTK_PLL_BASE + 0x00)
-#define MTK_PLL_PLL2 (MTK_PLL_BASE + 0x04)
-#define MTK_PLL_CLK_CON (MTK_PLL_BASE + 0x18)
-#define MTK_PLL_PDN_CON (MTK_PLL_BASE + 0x1C)
-
-/* MTK_PLL_PLL bit fields definitions */
-#define PLL_PLLVCOSEL (0 << 0)
-#define PLL_MPLLSEL_SYSCLK (1 << 3)
-#define PLL_MPLLSEL_PLL (2 << 3)
-#define PLL_DPLLSEL (1 << 5)
-#define PLL_UPLLSEL (1 << 6)
-#define PLL_RST (1 << 7)
-#define PLL_CALI (1 << 8)
-
-/* MTK_PLL_CLK_CON bit fields definitions */
-#define PLL_CLKSQ_DIV2_DSP (1 << 0)
-#define PLL_CLKSQ_DIV2_MCU (1 << 1)
-#define PLL_CLKSQ_PLD (1 << 2)
-#define PLL_SRCCLK (1 << 7)
-#define PLL_CLKSQ_TEST (1 << 15)
-
-/* MTK_PLL_PDN_CON bit fields definitions */
-#define PLL_PDN_CON_CLKSQ (1 << 11)
-#define PLL_PDN_CON_MCU_DIV2 (1 << 12)
-#define PLL_PDN_CON_PLL (1 << 13)
-#define PLL_PDN_CON_DSP_DIV2 (1 << 15)
-
-#endif
diff --git a/Src/osmoconbb/src/target/firmware/include/mtk/tdma_timer.h b/Src/osmoconbb/src/target/firmware/include/mtk/tdma_timer.h
deleted file mode 100644
index dec0a8a..0000000
--- a/Src/osmoconbb/src/target/firmware/include/mtk/tdma_timer.h
+++ /dev/null
@@ -1,60 +0,0 @@
-#ifndef _MTK_TDMA_H
-#define _MTK_TDMA_H
-
-/* MTK TDMA Timer */
-
-/* MT6235 Section 11 */
-
-enum mtk_tdma_reg {
- /* Read current quarter bit count */
- TDMA_TQCNT = 0x0000,
- /* Latched Qbit counter reset position */
- TDMA_WRAP = 0x0004,
- /* Direct Qbit counter reset position */
- TDMA_WRAPIMD = 0x0008,
- /* Event latch position */
- TDMA_EVTVAL = 0x000c,
- /* DSP software control */
- TDMA_DTIRQ = 0x0010,
- /* MCU software control */
- TDMA_CTIRQ1 = 0x0014,
- TDMA_CTIRQ2 = 0x0018,
- /* AFC control */
- TDMA_AFC0 = 0x0020,
- TDMA_AFC1 = 0x0024,
- TDMA_AFC2 = 0x0028,
- TDMA_AFC3 = 0x002c,
-
- /* BSI event */
- TDMA_BSI0 = 0x00b0,
- /* BPI event */
- TDMA_BPI0 = 0x0100,
- /* Auxiliary ADC event */
- TDMA_AUXEV0 = 0x0400,
- TDMA_AUXEV1 = 0x0404,
- /* Event Control */
- TDMA_EVTENA0 = 0x0150,
- TDMA_EVTENA1 = 0x0154,
- TDMA_EVTENA2 = 0x0158,
- TDMA_EVTENA3 = 0x015c,
- TDMA_EVTENA4 = 0x0160,
- TDMA_EVTENA5 = 0x0164,
- TDMA_EVTENA6 = 0x0168,
- TDMA_EVTENA6 = 0x016c,
- TDMA_WRAPOFS = 0x0170,
- TDMA_REGBIAS = 0x0174,
- TDMA_DTXCON = 0x0180,
- TDMA_RXCON = 0x0184,
- TDMA_BDLCON = 0x0188,
- TDMA_BULCON1 = 0x018c,
- TDMA_BULCON2 = 0x0190,
- TDMA_FB_FLAG = 0x0194,
- TDMA_FB_CLRI = 0x0198,
-};
-
-#define TDMA_BSI(n) (TDMA_BSI0 + (n)*4)
-#define TDMA_BPI(n) (TDMA_BPI0 + (n)*4)
-
-
-
-#endif /* _MTK_TDMA_H */
diff --git a/Src/osmoconbb/src/target/firmware/include/rf/trf6151.h b/Src/osmoconbb/src/target/firmware/include/rf/trf6151.h
deleted file mode 100644
index f0891b6..0000000
--- a/Src/osmoconbb/src/target/firmware/include/rf/trf6151.h
+++ /dev/null
@@ -1,49 +0,0 @@
-#ifndef _TRF6151_H
-#define _TRF6151_H
-
-#include <osmocom/gsm/gsm_utils.h>
-
-/* initialize (reset + power up) */
-void trf6151_init(uint8_t tsp_uid, uint16_t tsp_reset_id);
-
-/* switch power off or on */
-void trf6151_power(int on);
-
-/* obtain the current total gain of the TRF6151 */
-uint8_t trf6151_get_gain_reg(void);
-
-/* put current set (or computed) gain to register */
-int trf6151_set_gain_reg(uint8_t dbm, int high);
-
-/* set the global gain to use */
-int trf6151_set_gain(uint8_t dbm);
-
-/* obtain the global gain set */
-uint8_t trf6151_get_gain(void);
-
-/* Request the PLL to be tuned to the given frequency */
-void trf6151_set_arfcn(uint16_t arfcn, int uplink);
-
-enum trf6151_mode {
- TRF6151_IDLE,
- TRF6151_RX,
- TRF6151_TX,
-};
-
-/* Set the operational mode of the TRF6151 chip */
-void trf6151_set_mode(enum trf6151_mode mode);
-
-void trf6151_test(uint16_t arfcn);
-void trf6151_tx_test(uint16_t arfcn);
-
-/* prepare a Rx window with the TRF6151 finished at time 'start' (in qbits) */
-void trf6151_rx_window(int16_t start_qbits, uint16_t arfcn);
-
-/* prepare a Tx window with the TRF6151 finished at time 'start' (in qbits) */
-void trf6151_tx_window(int16_t start_qbits, uint16_t arfcn);
-
-/* Given the expected input level of exp_inp dBm and the target of target_bb
- * dBm, configure the RF Frontend with the respective gain */
-void trf6151_compute_gain(int16_t exp_inp, int16_t target_bb);
-
-#endif /* TRF6151_H */
diff --git a/Src/osmoconbb/src/target/firmware/include/rffe.h b/Src/osmoconbb/src/target/firmware/include/rffe.h
deleted file mode 100644
index 63a3a4b..0000000
--- a/Src/osmoconbb/src/target/firmware/include/rffe.h
+++ /dev/null
@@ -1,35 +0,0 @@
-#ifndef _RFFE_H
-#define _RFFE_H
-
-#include <osmocom/gsm/gsm_utils.h>
-
-extern const uint8_t system_inherent_gain;
-
-/* initialize RF Frontend */
-void rffe_init(void);
-
-/* switch RF Frontend Mode */
-void rffe_mode(enum gsm_band band, int tx);
-
-/* query RF wiring */
-enum rffe_port
-{
- PORT_LO = 0, /* Combined 850/900 port */
- PORT_HI = 1, /* Combined 1800/1900 port */
- PORT_GSM850 = 2,
- PORT_GSM900 = 3,
- PORT_DCS1800 = 4,
- PORT_PCS1900 = 5,
-};
-
-uint32_t rffe_get_rx_ports(void);
-uint32_t rffe_get_tx_ports(void);
-
-/* get current gain of RF frontend (anything between antenna and baseband in dBm */
-uint8_t rffe_get_gain(void);
-
-void rffe_set_gain(uint8_t dbm);
-
-void rffe_compute_gain(int16_t exp_inp, int16_t target_bb);
-
-#endif
diff --git a/Src/osmoconbb/src/target/firmware/include/spi.h b/Src/osmoconbb/src/target/firmware/include/spi.h
deleted file mode 100644
index 0925a9a..0000000
--- a/Src/osmoconbb/src/target/firmware/include/spi.h
+++ /dev/null
@@ -1,7 +0,0 @@
-#ifndef _SPI_H
-#define _SPI_H
-
-void spi_init(void);
-int spi_xfer(uint8_t dev_idx, uint8_t bitlen, const void *dout, void *din);
-
-#endif /* _SPI_H */
diff --git a/Src/osmoconbb/src/target/firmware/include/stdint.h b/Src/osmoconbb/src/target/firmware/include/stdint.h
deleted file mode 100644
index 627403f..0000000
--- a/Src/osmoconbb/src/target/firmware/include/stdint.h
+++ /dev/null
@@ -1,36 +0,0 @@
-#ifndef OSMO_STDINT_H
-#define OSMO_STDINT_H
-
-/* some older toolchains (like gnuarm-3.x) don't provide a C99
- compliant stdint.h yet, so we define our own here */
-
-/* to make matters worse newer gcc with glibc headers have
- a incompatible definition of these types. We will use the
- gcc'ism of #include_next to include the compiler's libc
- header file and then check if it has defined int8_t and
- if not we will use our own typedefs */
-
-/* another bad criteria. We can not detect __NEWLIB_H__ or
- _NEWLIB_VERSION. Assume that older GCCs have a older C library
- that did not include a stdint.h yet. This is for gnuarm-3.x
- one of the compilers producing working code right now. */
-
-#if __GNUC__ > 3
-#include_next <stdint.h>
-#endif
-
-#ifndef __int8_t_defined
-typedef signed char int8_t;
-typedef unsigned char uint8_t;
-
-typedef signed short int16_t;
-typedef unsigned short uint16_t;
-
-typedef signed int int32_t;
-typedef unsigned int uint32_t;
-
-typedef long long int int64_t;
-typedef unsigned long long int uint64_t;
-#endif
-
-#endif
diff --git a/Src/osmoconbb/src/target/firmware/include/stdio.h b/Src/osmoconbb/src/target/firmware/include/stdio.h
deleted file mode 100644
index 15ed668..0000000
--- a/Src/osmoconbb/src/target/firmware/include/stdio.h
+++ /dev/null
@@ -1,52 +0,0 @@
-#ifndef _STDIO_H
-#define _STDIO_H
-
-#ifndef NULL
-#define NULL 0
-#endif /* NULL */
-
-#include <sys/types.h>
-
-int printf(const char *format, ...);
-int sprintf(char *str, const char *format, ...);
-int snprintf(char *str, size_t size, const char *format, ...);
-
-#include <stdarg.h>
-
-int vprintf(const char *format, va_list ap);
-int vsprintf(char *str, const char *format, va_list ap);
-int vsnprintf(char *str, size_t size, const char *format, va_list ap);
-int puts(const char *s);
-
-#if 0
-/* start.S based uart console */
-#include <calypso/uart.h>
-#define putchar(c) uart_putchar_wait(1, c)
-int puts(const char *s);
-#endif
-
-#if 0
-/* regular UART console */
-#include <console.h>
-#define putchar(c) cons_putchar(c)
-#define _puts(s) cons_puts(s)
-#define ARCH_HAS_CONSOLE
-#endif
-
-#if 1
-/* sercomm based console */
-#include <comm/sercomm_cons.h>
-#define putchar(c) sercomm_putchar(c)
-#define _puts(s) sercomm_puts(s)
-#define ARCH_HAS_CONSOLE
-#endif
-
-struct __file {
-};
-
-typedef struct __file FILE;
-
-/* non-standard */
-extern void phex(unsigned int c, unsigned int len);
-
-#endif /* _STDIO_H */
diff --git a/Src/osmoconbb/src/target/firmware/include/string.h b/Src/osmoconbb/src/target/firmware/include/string.h
deleted file mode 100644
index f060659..0000000
--- a/Src/osmoconbb/src/target/firmware/include/string.h
+++ /dev/null
@@ -1,12 +0,0 @@
-#ifndef _STRING_H
-#define _STRING_H
-
-#include <sys/types.h>
-
-size_t strnlen(const char *s, size_t count);
-size_t strlen(const char *s);
-
-void *memset(void *s, int c, size_t n);
-void *memcpy(void *dest, const void *src, size_t n);
-
-#endif
diff --git a/Src/osmoconbb/src/target/firmware/include/swab.h b/Src/osmoconbb/src/target/firmware/include/swab.h
deleted file mode 100644
index 61be900..0000000
--- a/Src/osmoconbb/src/target/firmware/include/swab.h
+++ /dev/null
@@ -1,297 +0,0 @@
-#ifndef _LINUX_SWAB_H
-#define _LINUX_SWAB_H
-
-#include <stdint.h>
-#include <defines.h>
-#include <asm/swab.h>
-
-/*
- * casts are necessary for constants, because we never know how for sure
- * how U/UL/ULL map to uint16_t, uint32_t, uint64_t. At least not in a portable way.
- */
-#define ___constant_swab16(x) ((uint16_t)( \
- (((uint16_t)(x) & (uint16_t)0x00ffU) << 8) | \
- (((uint16_t)(x) & (uint16_t)0xff00U) >> 8)))
-
-#define ___constant_swab32(x) ((uint32_t)( \
- (((uint32_t)(x) & (uint32_t)0x000000ffUL) << 24) | \
- (((uint32_t)(x) & (uint32_t)0x0000ff00UL) << 8) | \
- (((uint32_t)(x) & (uint32_t)0x00ff0000UL) >> 8) | \
- (((uint32_t)(x) & (uint32_t)0xff000000UL) >> 24)))
-
-#define ___constant_swab64(x) ((uint64_t)( \
- (((uint64_t)(x) & (uint64_t)0x00000000000000ffULL) << 56) | \
- (((uint64_t)(x) & (uint64_t)0x000000000000ff00ULL) << 40) | \
- (((uint64_t)(x) & (uint64_t)0x0000000000ff0000ULL) << 24) | \
- (((uint64_t)(x) & (uint64_t)0x00000000ff000000ULL) << 8) | \
- (((uint64_t)(x) & (uint64_t)0x000000ff00000000ULL) >> 8) | \
- (((uint64_t)(x) & (uint64_t)0x0000ff0000000000ULL) >> 24) | \
- (((uint64_t)(x) & (uint64_t)0x00ff000000000000ULL) >> 40) | \
- (((uint64_t)(x) & (uint64_t)0xff00000000000000ULL) >> 56)))
-
-#define ___constant_swahw32(x) ((uint32_t)( \
- (((uint32_t)(x) & (uint32_t)0x0000ffffUL) << 16) | \
- (((uint32_t)(x) & (uint32_t)0xffff0000UL) >> 16)))
-
-#define ___constant_swahb32(x) ((uint32_t)( \
- (((uint32_t)(x) & (uint32_t)0x00ff00ffUL) << 8) | \
- (((uint32_t)(x) & (uint32_t)0xff00ff00UL) >> 8)))
-
-/*
- * Implement the following as inlines, but define the interface using
- * macros to allow constant folding when possible:
- * ___swab16, ___swab32, ___swab64, ___swahw32, ___swahb32
- */
-
-static inline __attribute_const__ uint16_t __fswab16(uint16_t val)
-{
-#ifdef __arch_swab16
- return __arch_swab16(val);
-#else
- return ___constant_swab16(val);
-#endif
-}
-
-static inline __attribute_const__ uint32_t __fswab32(uint32_t val)
-{
-#ifdef __arch_swab32
- return __arch_swab32(val);
-#else
- return ___constant_swab32(val);
-#endif
-}
-
-static inline __attribute_const__ uint64_t __fswab64(uint64_t val)
-{
-#ifdef __arch_swab64
- return __arch_swab64(val);
-#elif defined(__SWAB_64_THRU_32__)
- uint32_t h = val >> 32;
- uint32_t l = val & ((1ULL << 32) - 1);
- return (((uint64_t)__fswab32(l)) << 32) | ((uint64_t)(__fswab32(h)));
-#else
- return ___constant_swab64(val);
-#endif
-}
-
-static inline __attribute_const__ uint32_t __fswahw32(uint32_t val)
-{
-#ifdef __arch_swahw32
- return __arch_swahw32(val);
-#else
- return ___constant_swahw32(val);
-#endif
-}
-
-static inline __attribute_const__ uint32_t __fswahb32(uint32_t val)
-{
-#ifdef __arch_swahb32
- return __arch_swahb32(val);
-#else
- return ___constant_swahb32(val);
-#endif
-}
-
-/**
- * __swab16 - return a byteswapped 16-bit value
- * @x: value to byteswap
- */
-#define __swab16(x) \
- (__builtin_constant_p((uint16_t)(x)) ? \
- ___constant_swab16(x) : \
- __fswab16(x))
-
-/**
- * __swab32 - return a byteswapped 32-bit value
- * @x: value to byteswap
- */
-#define __swab32(x) \
- (__builtin_constant_p((uint32_t)(x)) ? \
- ___constant_swab32(x) : \
- __fswab32(x))
-
-/**
- * __swab64 - return a byteswapped 64-bit value
- * @x: value to byteswap
- */
-#define __swab64(x) \
- (__builtin_constant_p((uint64_t)(x)) ? \
- ___constant_swab64(x) : \
- __fswab64(x))
-
-/**
- * __swahw32 - return a word-swapped 32-bit value
- * @x: value to wordswap
- *
- * __swahw32(0x12340000) is 0x00001234
- */
-#define __swahw32(x) \
- (__builtin_constant_p((uint32_t)(x)) ? \
- ___constant_swahw32(x) : \
- __fswahw32(x))
-
-/**
- * __swahb32 - return a high and low byte-swapped 32-bit value
- * @x: value to byteswap
- *
- * __swahb32(0x12345678) is 0x34127856
- */
-#define __swahb32(x) \
- (__builtin_constant_p((uint32_t)(x)) ? \
- ___constant_swahb32(x) : \
- __fswahb32(x))
-
-/**
- * __swab16p - return a byteswapped 16-bit value from a pointer
- * @p: pointer to a naturally-aligned 16-bit value
- */
-static inline uint16_t __swab16p(const uint16_t *p)
-{
-#ifdef __arch_swab16p
- return __arch_swab16p(p);
-#else
- return __swab16(*p);
-#endif
-}
-
-/**
- * __swab32p - return a byteswapped 32-bit value from a pointer
- * @p: pointer to a naturally-aligned 32-bit value
- */
-static inline uint32_t __swab32p(const uint32_t *p)
-{
-#ifdef __arch_swab32p
- return __arch_swab32p(p);
-#else
- return __swab32(*p);
-#endif
-}
-
-/**
- * __swab64p - return a byteswapped 64-bit value from a pointer
- * @p: pointer to a naturally-aligned 64-bit value
- */
-static inline uint64_t __swab64p(const uint64_t *p)
-{
-#ifdef __arch_swab64p
- return __arch_swab64p(p);
-#else
- return __swab64(*p);
-#endif
-}
-
-/**
- * __swahw32p - return a wordswapped 32-bit value from a pointer
- * @p: pointer to a naturally-aligned 32-bit value
- *
- * See __swahw32() for details of wordswapping.
- */
-static inline uint32_t __swahw32p(const uint32_t *p)
-{
-#ifdef __arch_swahw32p
- return __arch_swahw32p(p);
-#else
- return __swahw32(*p);
-#endif
-}
-
-/**
- * __swahb32p - return a high and low byteswapped 32-bit value from a pointer
- * @p: pointer to a naturally-aligned 32-bit value
- *
- * See __swahb32() for details of high/low byteswapping.
- */
-static inline uint32_t __swahb32p(const uint32_t *p)
-{
-#ifdef __arch_swahb32p
- return __arch_swahb32p(p);
-#else
- return __swahb32(*p);
-#endif
-}
-
-/**
- * __swab16s - byteswap a 16-bit value in-place
- * @p: pointer to a naturally-aligned 16-bit value
- */
-static inline void __swab16s(uint16_t *p)
-{
-#ifdef __arch_swab16s
- __arch_swab16s(p);
-#else
- *p = __swab16p(p);
-#endif
-}
-/**
- * __swab32s - byteswap a 32-bit value in-place
- * @p: pointer to a naturally-aligned 32-bit value
- */
-static inline void __swab32s(uint32_t *p)
-{
-#ifdef __arch_swab32s
- __arch_swab32s(p);
-#else
- *p = __swab32p(p);
-#endif
-}
-
-/**
- * __swab64s - byteswap a 64-bit value in-place
- * @p: pointer to a naturally-aligned 64-bit value
- */
-static inline void __swab64s(uint64_t *p)
-{
-#ifdef __arch_swab64s
- __arch_swab64s(p);
-#else
- *p = __swab64p(p);
-#endif
-}
-
-/**
- * __swahw32s - wordswap a 32-bit value in-place
- * @p: pointer to a naturally-aligned 32-bit value
- *
- * See __swahw32() for details of wordswapping
- */
-static inline void __swahw32s(uint32_t *p)
-{
-#ifdef __arch_swahw32s
- __arch_swahw32s(p);
-#else
- *p = __swahw32p(p);
-#endif
-}
-
-/**
- * __swahb32s - high and low byteswap a 32-bit value in-place
- * @p: pointer to a naturally-aligned 32-bit value
- *
- * See __swahb32() for details of high and low byte swapping
- */
-static inline void __swahb32s(uint32_t *p)
-{
-#ifdef __arch_swahb32s
- __arch_swahb32s(p);
-#else
- *p = __swahb32p(p);
-#endif
-}
-
-# define swab16 __swab16
-# define swab32 __swab32
-# define swab64 __swab64
-# define swahw32 __swahw32
-# define swahb32 __swahb32
-# define swab16p __swab16p
-# define swab32p __swab32p
-# define swab64p __swab64p
-# define swahw32p __swahw32p
-# define swahb32p __swahb32p
-# define swab16s __swab16s
-# define swab32s __swab32s
-# define swab64s __swab64s
-# define swahw32s __swahw32s
-# define swahb32s __swahb32s
-
-#endif /* _LINUX_SWAB_H */
diff --git a/Src/osmoconbb/src/target/firmware/include/uart.h b/Src/osmoconbb/src/target/firmware/include/uart.h
deleted file mode 100644
index 81d7a15..0000000
--- a/Src/osmoconbb/src/target/firmware/include/uart.h
+++ /dev/null
@@ -1,32 +0,0 @@
-#ifndef _UART_H
-#define _UART_H
-
-#include <stdint.h>
-
-enum uart_baudrate {
- UART_38400,
- UART_57600,
- UART_115200,
- UART_230400,
- UART_460800,
- UART_614400,
- UART_921600,
-};
-
-void uart_init(uint8_t uart, uint8_t interrupts);
-void uart_putchar_wait(uint8_t uart, int c);
-int uart_putchar_nb(uint8_t uart, int c);
-int uart_getchar_nb(uint8_t uart, uint8_t *ch);
-int uart_tx_busy(uint8_t uart);
-int uart_baudrate(uint8_t uart, enum uart_baudrate bdrt);
-
-enum uart_irq {
- UART_IRQ_TX_EMPTY,
- UART_IRQ_RX_CHAR,
-};
-
-void uart_irq_enable(uint8_t uart, enum uart_irq irq, int on);
-
-void uart_poll(uint8_t uart);
-
-#endif /* _UART_H */
diff --git a/Src/osmoconbb/src/target/firmware/include/uwire.h b/Src/osmoconbb/src/target/firmware/include/uwire.h
deleted file mode 100644
index 6d34553..0000000
--- a/Src/osmoconbb/src/target/firmware/include/uwire.h
+++ /dev/null
@@ -1,7 +0,0 @@
-#ifndef _UWIRE_H
-#define _UWIRE_H
-
-void uwire_init(void);
-int uwire_xfer(int cs, int bitlen, const void *dout, void *din);
-
-#endif /* _UWIRE_H */